Comp. Prop Delay: Significance & How to Choose High Speed Comp

In summary, the propagation delay of a comparator is an important factor in circuit design and can affect performance and stability, especially when using positive feedback hysteresis. The rise time of the input is not directly related to the propagation delay, and using positive feedback can cause oscillations if not properly designed.
  • #1
likephysics
636
2
How is comparator prop delay significant?
It's just delay, isn't it. Input occurs at say, t secs, output will occur at t+x secs.
I am looking for a high speed comparator, I don't understand why manufacturer's classify speed based on propagation delay. Isn't rise time the factor that decides speed -
tr= 0.33/freq?
 
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  • #2
likephysics said:
How is comparator prop delay significant?
It's just delay, isn't it. Input occurs at say, t secs, output will occur at t+x secs.
I am looking for a high speed comparator, I don't understand why manufacturer's classify speed based on propagation delay. Isn't rise time the factor that decides speed -
tr= 0.33/freq?

The equation you list is not applicable to the rise and fall times of a gate output. The equation relates the spectral width of a square wave's spectra to its rise and fall times.

The prop time of the comparator is important for several reasons, but one is that you need the positive feedback hysteresis to get back to the input quickly enough to prevent oscillations. That's one of the most important parts of high-speed comparator circuit design and PCB layout -- preventing oscillations. The high-speed comparator that you have chosen probably has some layout guidelines to help with the oscillation issues.
 
  • #3
berkeman said:
The equation you list is not applicable to the rise and fall times of a gate output. The equation relates the spectral width of a square wave's spectra to its rise and fall times.

The prop time of the comparator is important for several reasons, but one is that you need the positive feedback hysteresis to get back to the input quickly enough to prevent oscillations. That's one of the most important parts of high-speed comparator circuit design and PCB layout -- preventing oscillations. The high-speed comparator that you have chosen probably has some layout guidelines to help with the oscillation issues.

aha! Got it. So if I don't use +ve feedback, prop delay shouldn't matter?
Anyway, I was just testing LM311 this morning on the breadboard. Worked great upto 1MHz, but then the output was high all the time. I thought, the rise time of the input was too fast for LM311.
Now I get it. The feedback is taking too long. Any equations that relate prop delay with +ve feedback?
 
  • #4
likephysics said:
aha! Got it. So if I don't use +ve feedback, prop delay shouldn't matter?

I suppose it won't matter, because the comparator will be singing (oscillating) :smile:

likephysics said:
Anyway, I was just testing LM311 this morning on the breadboard. Worked great upto 1MHz, but then the output was high all the time. I thought, the rise time of the input was too fast for LM311.
Now I get it. The feedback is taking too long. Any equations that relate prop delay with +ve feedback?

I don't know that it's the feedback not being fast enough that's keeping the output from responding. It may just be internal delays that can't keep up with the fast input switching.
 

1. What is the significance of computational propagation delay?

The computational propagation delay is the amount of time it takes for a signal to travel through a digital system. This delay is important because it can affect the overall performance and reliability of the system, especially in high-speed applications.

2. How is computational propagation delay measured?

Computational propagation delay is typically measured in nanoseconds (ns) or picoseconds (ps). It can be measured by sending a test signal through the system and recording the time it takes for the signal to reach its destination.

3. How does computational propagation delay impact high-speed computing?

In high-speed computing, even small delays can have a significant impact on the overall performance of the system. This is because high-speed systems rely on fast and accurate communication between components, and any delay can lead to errors and decreased efficiency.

4. How can one choose the appropriate computational propagation delay for a high-speed system?

The appropriate computational propagation delay for a high-speed system depends on the specific requirements and constraints of the system. Factors such as the type of components used, the desired speed and accuracy, and the budget should all be considered when choosing a delay.

5. Can computational propagation delay be reduced?

Yes, computational propagation delay can be reduced by using faster components, optimizing the layout and design of the system, and implementing advanced techniques such as pipelining and parallel processing. However, it is important to balance the reduction of delay with the cost and complexity of these solutions.

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