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Δ & Y and Superposition Theorem? |
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| Jan11-13, 10:11 PM | #18 |
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Δ & Y and Superposition Theorem?You can choose any node you wish as the reference node in either circuit. The particular potentials at given nodes with respect to an arbitrary reference point are not as important as the potential differences between pairs of nodes -- the Vab, Vac, Vbc potentials. |
| Jan11-13, 10:15 PM | #19 |
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Now what's confusing me is the non-existence of a voltage source. Is it not necessary to have one for a current to run through?
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| Jan11-13, 10:25 PM | #20 |
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A voltage source will produce any amount of current required to maintain its specified voltage (regardless of the load). Think of it as a really good battery. A current source will produce any amount of voltage required to maintain its specified current (regardless of the load). |
| Jan11-13, 10:28 PM | #21 |
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Thanks for the help! There appears to be a lot my book (Purcell's EM) hasn't covered about circuits such as Nodal Analysis & Current Sources. I'll work through the Math and get back to you.
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| Jan12-13, 02:36 AM | #22 |
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My question is in the next post. I think this is accurate but somethings wrong with my Y configuration.
My question is in the next post. I think this is accurate but somethings wrong with my Y configuration. My question is in the next post. I think this is accurate but somethings wrong with my Y configuration. This is just my work for the Δ configuration. The last two statements before each dashed line are the voltages differences of VA & VC with VB. Subtracting the two should get me the voltage difference between VA & VC. I'll work through Y and post it next. No questions as of yet. Let R1 = 34, R2 = 85 and R3 = 170 ======================================================================= ==== Suppressing I2 and I3: Equation 1 VC([itex]\frac{1}{R2}[/itex] + [itex]\frac{1}{R3}[/itex]) - VA([itex]\frac{1}{R2}[/itex]) = 0 VC = VA([itex]\frac{R3}{R2 + R3}[/itex]) Equation 2 VA([itex]\frac{1}{R1}[/itex] + [itex]\frac{1}{R2}[/itex]) - VC([itex]\frac{1}{R2}[/itex]) = I1 Eq 1 + Eq 2 VA([itex]\frac{1}{R1}[/itex] + [itex]\frac{1}{R2}[/itex]) - VA([itex]\frac{R3}{R2(R2+R3)}[/itex]) = I1 VA = I1/([itex]\frac{1}{R1}[/itex] + [itex]\frac{1}{R2}[/itex] - [itex]\frac{R3}{R2(R2+R3)}[/itex]) Back to Eq 1 VC = I1([itex]\frac{R3}{R2 + R3}[/itex])/([itex]\frac{1}{R1}[/itex] + [itex]\frac{1}{R2}[/itex] - [itex]\frac{R3}{R2(R2+R3)}[/itex]) ======================================================================= ==== Suppressing I1 and I3: Equation 3 VA([itex]\frac{1}{R1}[/itex] + [itex]\frac{1}{R2}[/itex]) - VC([itex]\frac{1}{R2}[/itex]) = I2 VA = (I2 + [itex]\frac{Vc}{R2}[/itex])([itex]\frac{R1*R2}{R1 + R2}[/itex]) Equation 4 VA([itex]\frac{1}{R2}[/itex]) - VC([itex]\frac{1}{R2}[/itex] + [itex]\frac{1}{R3}[/itex]) = I2 Eq 3 + Eq 4 (I2 + [itex]\frac{Vc}{R2}[/itex])([itex]\frac{R1}{R1 + R2}[/itex]) - VC([itex]\frac{1}{R2}[/itex] + [itex]\frac{1}{R3}[/itex]) = I2 VC([itex]\frac{R1}{R2(R1 + R2)}[/itex] - [itex]\frac{1}{R2}[/itex] - [itex]\frac{1}{R3}[/itex]) = I2([itex]\frac{R2}{R1 + R2}[/itex]) VC = I2([itex]\frac{R2}{R1 + R2}[/itex])/([itex]\frac{R1}{R2(R1 + R2)}[/itex] - [itex]\frac{1}{R2}[/itex] - [itex]\frac{1}{R3}[/itex]) Back to Eq 3 VA = I2([itex]\frac{R1*R2}{R1 + R2}[/itex])(1 + [itex]\frac{\frac{1}{R1 + R2}}{\frac{R1}{R2(R1 + R2)} - \frac{1}{R2} - \frac{1}{R3}}[/itex]) ======================================================================= ==== Suppressing I1 and I2: Equation 5 VA([itex]\frac{1}{R1}[/itex] + [itex]\frac{1}{R2}[/itex]) - VC([itex]\frac{1}{R2}[/itex]) = 0 VA = VC([itex]\frac{R1}{R1 + R2}[/itex]) Equation 6 VC([itex]\frac{1}{R2}[/itex] + [itex]\frac{3}{R2}[/itex]) - VA([itex]\frac{1}{R2}[/itex]) = I3 Eq 5 + Eq 6 VC([itex]\frac{1}{R2}[/itex] + [itex]\frac{1}{R3}[/itex]) - VC([itex]\frac{R1}{R2(R1+R2)}[/itex]) = I3 VC = I3/([itex]\frac{1}{R2}[/itex] + [itex]\frac{1}{R3}[/itex] - [itex]\frac{R1}{R2(R1+R2)}[/itex]) Back to Eq 5 VA = I3([itex]\frac{R1}{R1 + R2}[/itex])/([itex]\frac{1}{R2}[/itex] + [itex]\frac{1}{R3}[/itex] - [itex]\frac{R1}{R2(R1+R2)}[/itex]) ======================================================================= ==== |
| Jan12-13, 03:50 AM | #23 |
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![]() Voltage Differences from Δ data: Va,b = 30I1 + 10I2 + 20I3 Vc,b = 20I1 - 50I2 + 70I3 Va,c = 10I1 + 60I2 - 50I3 Question: 1) Why do these calculations give a voltage drop that occurs towards the reference node and not away? 2) When I do voltage difference calculations for Y, I'm missing the 20I3 term for Va,b & 20I1 term for Vc,b. Both seem to depend on the top-most resistor but I can't seem to figure out how to bring in the extraneous term. I've tried a source transformation; however, it just seems strange on the wye-configuration. Let R1 = 10, R2 = 20 and R3 = 50 ======================================================================= ==== Suppressing I2 and I3: Equation 7 (VA - VO)([itex]\frac{1}{R1}[/itex]) = I1 Equation 8 (VA - VO)([itex]\frac{1}{R1}[/itex]) - (VO)([itex]\frac{1}{R2}[/itex]) = 0 Eq 7 + Eq 8 (VO) = I1R2 (VA) = I1(R1 + R2) ======================================================================= ==== Suppressing I1 and I3: Equation 9 (VA - VO)([itex]\frac{1}{R1}[/itex]) = I2 Equation 10 (VO - VC)([itex]\frac{1}{R3}[/itex]) = I2 Equation 11 (VO)([itex]\frac{1}{R2}[/itex]) + (VO - VA)([itex]\frac{1}{R3}[/itex]) + (VO + VC)([itex]\frac{1}{R3}[/itex]) = 0 Eq 9 & 10 + 11 (VO)([itex]\frac{1}{R2}[/itex]) - I2 + I2 = 0 VO = 0 VA = I2R1 VC = -I2R3 ======================================================================= ==== Suppressing I1 and I2: Equation 12 (VC - VO)([itex]\frac{1}{R3}[/itex]) = I3 Equation 13 (VC - VO)([itex]\frac{1}{R3}[/itex]) - (VO)([itex]\frac{1}{R2}[/itex]) = 0 Eq 12 + Eq 13 (VO) = I3R2 (VC) = I3(R2 + R3) ======================================================================= ==== |
| Jan12-13, 08:59 AM | #24 |
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If I may make a suggestion about the Y circuit analysis, the central node you've labelled "o" in your diagram is entirely internal to the "black box", so you don't need its value when comparing the two configurations. Why not take advantage of this by moving the reference node from b to o? It also has the advantage that the potentials of open nodes will be zero, so there's nothing to "carry along" for them for the superposition sum. |
| Jan12-13, 03:27 PM | #25 |
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I see. The lack of current across the wire connecting o and c means no voltage potential drop; however that doesn't mean no voltage potential. In my diagrams, I took to the habit of completely dropping open circuits but now I see why thats incorrect.
As for the reference node, o is a better choice because it connects to more wires I suppose. Out of desperation, I tried to transform the current source and R2 resister into a voltage source and parallel resistor but there was always a resistor in the way. I'm sure this is incorrect. You mentioned the direction of the current decides the direction of voltage drop; however I2 seems arbitrary. I'm assuming the sign would've worked out either way to give the right direction. Does this mean that only I1 & I3 are determine the direction of voltage drop? |
| Jan12-13, 03:41 PM | #26 |
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| Jan13-13, 03:51 AM | #27 |
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| Jan13-13, 08:01 AM | #28 |
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If you change the directions of one or more of the currents you'll change the signs of one or more coefficients of the resulting voltage equations (Vab, Vcb,...) This is why it's important to have the same currents in the same locations and orientations for both circuits if you wish to compare them.
When you calculate a potential between nodes it's up to you to choose the direction that you want to consider "positive". It's like which node you place the negative lead of meter on, and which the positive lead; switch the leads around and the sign of measured voltage changes while the magnitude remains the same. So, for example, Vac = -Vca. For a given setup of the current sources, you should arrive at the same set of equations for the oriented potentials Vab, Vcb, etc., regardless of which node you choose for the reference node. |
| Jan13-13, 03:58 PM | #29 |
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Thank you so much sir for answering all my questions and helping me understand the nitty-gritty details of this problem. Most of the stuff about circuit analysis (Nodal Analysis, Mesh Analysis, Superposition Theorem, etc.) wasn't in my book and I either learned it here from you or heard about it so I knew what to further investigate. |
| Jan13-13, 04:02 PM | #30 |
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