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Need help in understand the "Markers" on electronic chips
I am just wondering what is the markers telling us, like what has shown in the diagram, the CLR is telling us if we apply active-high state input to that port, the flip flop will be reset right? But there is some case where the Markers is labeled as CLR' (bar-CLR) and there is a bubble attached at the port it should be something like "NOT gate". So in this case how do i determine whether should i apply high or low state to reset my flip flop?
If CLR is labeled without bar, does it mean when the port receive high state, ff is reset;
and if CLR is labeled with bar, does it mean when the port receive low state, ff is reset?
Do the bubble determine anything?
I am just wondering what is the markers telling us, like what has shown in the diagram, the CLR is telling us if we apply active-high state input to that port, the flip flop will be reset right? But there is some case where the Markers is labeled as CLR' (bar-CLR) and there is a bubble attached at the port it should be something like "NOT gate". So in this case how do i determine whether should i apply high or low state to reset my flip flop?
If CLR is labeled without bar, does it mean when the port receive high state, ff is reset;
and if CLR is labeled with bar, does it mean when the port receive low state, ff is reset?
Do the bubble determine anything?