Designing a monoflop (monostable multi-vibrator) for high frequency

[cherry_ying]

Hi,

I am required to design a monostable multi-vibrator suited for high frequency 200MHz. I am currently referring to this site http://www.play-hookey.com/digital/experiments/rtl_monostable.html for my design, however, it seems that this is only made for low frequencies. What should I do in order to adapt this design for high frequency?

Furthermore, I am only using a simulation software for this circuit, so components designed for high frequency is not a problem.


Thanks

 

[berkeman]

Hi,

I am required to design a monostable multi-vibrator suited for high frequency 200MHz. I am currently referring to this site http://www.play-hookey.com/digital/experiments/rtl_monostable.html for my design, however, it seems that this is only made for low frequencies. What should I do in order to adapt this design for high frequency?

Furthermore, I am only using a simulation software for this circuit, so components designed for high frequency is not a problem.


Thanks

What have you learned in class so far? What do you do differently in circuit design in order to get up into the 200MHz range? What circuit structures should you use?

Tell us what you have learned so far, and what your thoughts are about this design project. Then we may be able to offer up some hints...

 

[cherry_ying]

What have you learned in class so far? What do you do differently in circuit design in order to get up into the 200MHz range? What circuit structures should you use?

Tell us what you have learned so far, and what your thoughts are about this design project. Then we may be able to offer up some hints...

I have learned nothing regarding this (what should I do differently in order to get into the 200MHz range) since this was a project assigned to me for this research position I'm doing. I was only told me refer to the design from a master's thesis, and with my current knowledge of circuits, which only include L, C and R, I don't even have any idea on where to start.

I know that the monoflop design I based on from the site I mentioned works for low frequency, however, once I apply it to high frequency square waves, it doesn't work. And I have no clue where to even start.

 

[berkeman]

I have learned nothing regarding this (what should I do differently in order to get into the 200MHz range) since this was a project assigned to me for this research position I'm doing. I was only told me refer to the design from a master's thesis, and with my current knowledge of circuits, which only include L, C and R, I don't even have any idea on where to start.

I know that the monoflop design I based on from the site I mentioned works for low frequency, however, once I apply it to high frequency square waves, it doesn't work. And I have no clue where to even start.

I'm not really understanding how your supervisors/instructors can expect you to figure this out without more schoolwork. Does your school offer classes in RF design? In high-speed analog & digital digital circuit design? Can you take some of these classes before starting on this project?

 

[Studiot]

You didn't mention what you are studying, but I assume it is some sort of electronics.

The problem with the monostable you have referred to in your link is that the transistor switches take too much time to turn off for the configuaration to work at higher frequency.

You need to consider what you can do about this to make the configuration work. Try revising transistor saturation and also find out about "speed up capacitors".

 

[vk6kro]

A monostable generates a single pulse output once triggered.
You can trigger it again with another pulse after the first output pulse has finished, but if you feed it with a stream of pulses, it will retrigger on the first one after the first pulse is finished. This gives an output which will appear to be triggered all the time.

So, the length of the output pulse should be less than the period of the triggering pulses.
If the output pulse is set to be 0.1 second, then the pulses triggering it needs to be less frequent than this.
You might deliver one pulse every 0.5 second, for example, and get one 0.1 second pulse every 0.5 seconds.

A monostable being triggered at 200 MHz is very unlikely, but if it existed, it would have to have an output pulse width of less than the period of the 200 MHz input. That is, less than 5 nanoseconds. Monostables are not generally used at frequencies above a few hundred Hz.

Monostables using discrete components would be quite rare these days, but there is no reason that you couldn't get one working.

Your circuit simulates OK. If triggered with pulses every 2 seconds, it gives pulses out that are 1.1 seconds long and start on the rising edge of the pulse.
It even ends the pulse if the input pulse is still present. So, it is quite a good circuit.
Here is my attempt at a simulation:
[PLAIN]http://dl.dropbox.com/u/4222062/Monostable.PNG

In the above diagram, you can see the white pulse is at the input of transistor Q3 and the larger green pulse is at the output of Q2. V2 generates 5 volt pulses that are 0.3 seconds long, every 2 seconds.
The important thing to notice is that the output pulse length is constant, almost regardless of the input pulses, as long as they do not occur while the output pulse is present.

 

[cherry_ying]

I'm not really understanding how your supervisors/instructors can expect you to figure this out without more schoolwork. Does your school offer classes in RF design? In high-speed analog & digital digital circuit design? Can you take some of these classes before starting on this project?

My supervisor gave me a reference to a master's thesis where the monoflop is supposedly to work. However, there are no values to the component, and no matter what combinations of value I try, I am not getting what I require, instead, from my graphs, it seems like the transistors are not even switching.

I am currently not at my home uni, and classes are almost over for the uni I currently am at. So I don't believe I can take any of these classes

Thanks for your reply

 

[cherry_ying]

A monostable generates a single pulse output once triggered.
You can trigger it again with another pulse after the first output pulse has finished, but if you feed it with a stream of pulses, it will retrigger on the first one after the first pulse is finished. This gives an output which will appear to be triggered all the time.

So, the length of the output pulse should be less than the period of the triggering pulses.
If the output pulse is set to be 0.1 second, then the pulses triggering it needs to be less frequent than this.
You might deliver one pulse every 0.5 second, for example, and get one 0.1 second pulse every 0.5 seconds.

A monostable being triggered at 200 MHz is very unlikely, but if it existed, it would have to have an output pulse width of less than the period of the 200 MHz input. That is, less than 5 nanoseconds. Monostables are not generally used at frequencies above a few hundred Hz.

Monostables using discrete components would be quite rare these days, but there is no reason that you couldn't get one working.

Your circuit simulates OK. If triggered with pulses every 2 seconds, it gives pulses out that are 1.1 seconds long and start on the rising edge of the pulse.
It even ends the pulse if the input pulse is still present. So, it is quite a good circuit.
Here is my attempt at a simulation:
[PLAIN]http://dl.dropbox.com/u/4222062/Monostable.PNG

In the above diagram, you can see the white pulse is at the input of transistor Q3 and the larger green pulse is at the output of Q2. V2 generates 5 volt pulses that are 0.3 seconds long, every 2 seconds.
The important thing to notice is that the output pulse length is constant, almost regardless of the input pulses, as long as they do not occur while the output pulse is present.

Okay, from my simulation, the circuit also works for low frequency, but the problem I'm having is to adapt it to high frequency, and I have no idea what to do.

Since monoflops are not generally used for high frequencies, what should I use in order to get the same result as monoflops for high frequencies?

Also, you mentioned that the ouput pulse are the same regardless of the input pulses, but if the input pulses are at high frequency, that would not work then.

 

[Studiot]

Since monoflops are not generally used for high frequencies, what should I use in order to get the same result as monoflops for high frequencies?

Actually they are but you need to use ECL. Many prescalars and other frequency dividers are actually monostables in disguise.

This baby should reach your frequencies.

http://www.datasheetcatalog.org/datasheets/166/396614_DS.pdf

 

[vk6kro]

Do you want to produce outputs that are a fraction of the period of the input in length?

If so, you may need to look at edge detectors.

There are various types. One I have used is to take a NAND gate and directly feed one of its inputs with a square wave but feed the other input via an inverting integrator.
This produces a small delay during which both inputs of the NAND gate are high and so the output goes low.
When the integrator output eventually goes low, the NAND output goes high again.

This delay depends on the R and C of the integrator, so you can make either of these variable.

You can do similar things with delay lines although making these variable is not so easy.

What actual pulse length do you want to get from your device?

 

[cherry_ying]

Actually they are but you need to use ECL. Many prescalars and other frequency dividers are actually monostables in disguise.

This baby should reach your frequencies.

http://www.datasheetcatalog.org/datasheets/166/396614_DS.pdf

I read through the data sheet. It seems like it suits what I'm looking for, however, I can't seem to find the schematic for it. I am required to actually produce a schematic of the monoflop. Is there any way to get the schematic of the MC10198?

 

[cherry_ying]

Do you want to produce outputs that are a fraction of the period of the input in length?

If so, you may need to look at edge detectors.

There are various types. One I have used is to take a NAND gate and directly feed one of its inputs with a square wave but feed the other input via an inverting integrator.
This produces a small delay during which both inputs of the NAND gate are high and so the output goes low.
When the integrator output eventually goes low, the NAND output goes high again.

This delay depends on the R and C of the integrator, so you can make either of these variable.

You can do similar things with delay lines although making these variable is not so easy.

What actual pulse length do you want to get from your device?

No, I am not required to reduce period of the pulse. Please see attached as to an idea of what I'm looking for, except it's shown for low frequency. In the graph, you can see that while one output is on, the other is off, and vice versa. Also, it almost have the same period as the input.

the pulse length I require are for one ouput, 1.5 V with width of 1.5 nsec. and For the other one, I require 3.3V with width of 3.5ns. My input pulse is around 5V with width of 3.5 nanosecond, and period of 5ns (since frequency is 200MHz).

thx!