Add 3 if greater than 5 Macro

[Michamus]

Hello everyone!

I have been an avid reader for some time now, and a huge fan of this site.

I love digital logic, and design circuits as a hobby. I've kind of hit a brick wall on a recent project though.

Essentially I'm trying to create an 8 bit adder that displays each of the inputs' sum, and the total sum as 7seg.

I found a http://www.seas.upenn.edu/~ese171/labise/Lab03_CombMultiplier.pdf" (top of pg 4) that states an ideal solution for binary to BCD is an "add 3 if greater than 5" macro.

Trouble is, I can't use macros on the system I'm utilizing to create my project, as it is strictly comprised of NOT gates.

I've searched far and wide (pretty much google, and this site) and have yet to find a circuit schematic for a macro that employs this method. Everyone seems to simply create a location in their schematic, and label it "add 3 if greater than 5 macro".

Any help on this would be appreciated. I'd understand if a schematic may not be easily found. I wouldn't be to disappointed, as this would create a micro project of recreating the macro logic myself. :D

 

[MATLABdude]

Assuming I'm reading this correctly, that's an awful lot of discrete logic!

NOT gates aren't functionally complete (in the sense that NORs and NANDs can be used in combination to generate the output of any other type of simple logic gate). For that matter, I don't think you can use them for any storage elements (short of maybe a NOR/NAND latch--but I seem to recall that worked great in theory, and not so good in reality).

In terms of 'impressive' demoes, I was a big fan of using relay logic--big, heavy, and loud.

Unfortunately, as the function of your circuit gets more complicated, you have to use impractical amounts of discrete components. And as the complexity of the circuit increases, so does the likelihood of mistakes, which can be quite difficult when you have a large wire-wrapped or even soldered rats nest. You'll note that the UPenn lab is done on an Xilinx FPGA--programmable connections and gates are much easier and less time-consuming to fix than real ones.

But if you persist, you can probably extend the one-bit binary comparator:
http://www.electronics-tutorials.ws/combination/comb_8.html

As the article notes, there are ICs that you can buy that do higher bit compare operations.

 

[Proton Soup]

yeah, i didn't think it was mathematically possible to build higher logic with NOT gates. they're kind of a degenerate form.

 

[Michamus]

Thank you very much for this link. I will be delving into this article, and seeing how far I can go with it.

As for the NOT gates only, it's pretty much what I'm stuck to in the medium I am using. I essentially create everything from AND gates to D Flip-Flops using only NOT gates. So yes, the logic gets overwhelming at times.

I just make the AND gates like so:
[URL]http://173.212.220.214/img/and.png[/URL]


I figure it will be good training once I am released from the Army, and can continue my education toward EE.

 

[Proton Soup]

ooooh, i see, you're using a wire logic

 

[Michamus]

Did some research, and it appears all I need is an XOR gate, with the outputs being fed into a NOR gate.

[URL]http://173.212.220.214/img/comparator.png[/URL]

Now the question is, how in the heck do I get it so it knows when to add.

I think maybe if I set the comparison bit(s) as B, with the variable bit(s) as A, I simply have the "equal to" and "less than" outputs follow through, with the "greater than" feeding into a simple adder.

Is this the right track?

 

[Michamus]

Comparator created

I found a TI CD4585B comparator logic diagram, and boy did it take some time to reconstruct, and understand. I recreated the thing, and it seems to work.

Apparently the A=B Carry In needs to be High, with the A>B and A<B inputs Low.

Attached is the diagram for the program I am using. Essentially each circle represents a NOT gate. Red is equivalent to a High value, with black as a Low value. Also, I seem to have forgotten to label the layout. The =,>,< outputs are in the same order as their respective inputs.

::I decided to include the TI Logic Diagram as well. You can find it on page 2 here: CD4585B.pdf::

So, it appears what I need to do now is setup two other inputs coming from the source for the "A0-3" inputs, and have one go through a 4bit adder, and another going straight through. The Adder inputs and outputs would only be allowed if the A0-3 inputs are determined to be greater than the B0-3 input, which will be set to 5 (0101). The straight through be allowed if the value is equal to, or less than 5 (0101).

So, here's a representation of what I'm thinking will be needed to complete the macro:
[URL]http://173.212.220.214/img/4bit-comparator-macro.png[/URL]

As I was creating the macro, I suddenly realized my adder may have to be 5 bits in order to complete the operation, with the Q0-3 outputs being the results outputted. Still working on the logic involved in that part.

Does it seem like I'm on the right path?

::Edit - On second thought, I decided to include the link to the TI official pdf, as it may be less confusing than the program I am using. ::

 

[Kenneth Mann]

I looked at the approach that you are following (add 3 if greater than 5 which is actually -add 6 if equal to or greater than 10) and find it a novel (to me) approach to converting from binary to BCD, however I have one basic misgiving to it. It seems to be more useful in making the conversion process in software easier, but does not appear to give the same advantage with hardware. With hardware many ways of doing this have, over the years, been used. Probably the most direct is to simply multiply each binary position by its decimal equivalent and add the results - in decimal. This simply results to taking each position (1, 2, 4, ...) and adding the value if it is a "1" in that position and skipping it if not. The drawback is that this requires using a decimal adder - but that's not much of a problem if one of several BCD methods is used. I tend to favor the "excess-three" approach.

A second novel approach, is the use of the "wire-or" to implement an "and". I wouldn't use it but I don't find any basic objection. Just don't try this with TTL unless they are open collector. The only other admonition - is that you use the circle (or something) to indicate an inversion.

One last question, however - why are you stuck with inverters?

KM

 

[Michamus]

I appreciate the reply Kenneth.

Currently the only software I have that allows me to design any logic circuits, is a simulator designed for a game. This game utilizes inverters only, which is why the limitation exists. To be perfectly honest, this game is what bit me hard with the realization that I love digital logic. I've gone so far as to design a true-to-time 12 hour digital clock in this game out of NOT gates.

To be honest, I would love to find another means of designing logic circuits, but I can't seem to find any software that is friendly for beginners. I plan on attending a University to study Electrical engineering starting this fall, with every intention of continuing to my PhD.

I know that there is hardware available that can be used, but I would prefer a software simulated environment for now, as it is considerably less costly.

Any programs you may use, or be aware of would be quite welcomed.


As for that decimal multiplier, I will have to do some serious research to start to understand multipliers. I have only recently been able to grasp adder/subtractor circuits.

 

[Kenneth Mann]

I appreciate the reply Kenneth.

Currently the only software I have that allows me to design any logic circuits, is a simulator designed for a game. This game utilizes inverters only, which is why the limitation exists. To be perfectly honest, this game is what bit me hard with the realization that I love digital logic. I've gone so far as to design a true-to-time 12 hour digital clock in this game out of NOT gates.

To be honest, I would love to find another means of designing logic circuits, but I can't seem to find any software that is friendly for beginners. I plan on attending a University to study Electrical engineering starting this fall, with every intention of continuing to my PhD.

Have you tried http://www.LogicCircuit.org/" ?

KM

 

[Kenneth Mann]

As for that decimal multiplier, I will have to do some serious research to start to understand multipliers. I have only recently been able to grasp adder/subtractor circuits.

Generally, all calculation, such as multiplication is done in binary, and then converted to BCD. Multiplying in binary is very simple. Just take the multiplicand (top number), and first multiply it by the rightmost bit of the multiplier. If the multiplier is "1", just put down the multiplicand value; and if it is "0" put down "0". Next, do the same for the second bit of the multiplier, but this time, put down the values shifted left by one position (it's the same as with decimal multiplication, but a lot simpler). Example: 12 X 6 = :

000000001100
000000000110
000000000000
00000001100
0000001100
000000000---
000001001000 = 72 in decimal

KM

 

[Michamus]

Thanks again Kenneth,

I've been checking out that software you referenced in more detail, it looks very promising. I especially enjoy the functionality it offers with all the variables. The fact that I could change the symbols to their respective shapes helped a lot too.

So, to kind of break it down a little further on the multiplier, so as to ensure I am following your logic properly, the operation works like this?

12(a) x 6(b)

[URL]http://173.212.220.214/img/binary-multiplication.png[/URL]
000000000000 <-0110 (b)
00000001100 <-0110 (b)
0000001100 <-0110 (b)
000000000---<-0110 (b)
000001001000 = 72 in decimal

This seems to agree with your results, but I just want to be sure this isn't a coincidence.

Now it seems it's time for me to dive into creating a circuit solution for this computation. :D

 

[Kenneth Mann]

Multiplying in binary is done in exactly the same way as it is done in decimal - - - as we are taught in the second or third grade (or whatever). Putting it more precisely in an example, take 10 X 6 in decimal (1010 X 0110 in binary). I made the slight change to avoid double 1's in both numbers, which could be confusing:

0000001010
0000000110
0000000000 - - - - - - This is achieved by multiplying "1010" by the first bit "0" in the multiplier
000001010 - - - - - - Multiplying "1010" by the second bit "1" and shifting left by one
00001010 - - - - - - Multiplying "1010" by the third bit "1" , shifted left by two
0000000 - - - - - - Multiplying "1010" by the third bit "0", shifted left by three
0000111100 - - - - - - adding the four rows, results in "60"

KM

 

[Kenneth Mann]

Thanks again Kenneth,

I've been checking out that software you referenced in more detail, it looks very promising. I especially enjoy the functionality it offers with all the variables. The fact that I could change the symbols to their respective shapes helped a lot too.

You found the ability to change symbols a lot quicker than I did at first.

KM

 

[Michamus]

Thanks for the clarification,

I sometimes have issues with inferred concepts, and have to get it down to the point where I absolutely understand it at an almost mundane level. I have found assuming I understand it just leads to more trouble down the road.

With the program, I was suddenly disappointed when I had thought I couldn't make components, and would have to design the entire circuit on a single board. Then the good ol' help file showed me the error of my ways. I love help files.

I think this program is exceptional, and quite fun to mess around with. I'm really glad you showed it to me.

Now I just need to hunker down, and figure out the logic on creating a multiplier with the operation you so kindly showed me.

 

[Michamus]

I've been tinkering with Logical Circuit, and have devised a possible multiplier. It appears to function, and operates this way:

. . . . . b1 b0
. . . .x a1 a0
c3 c2 c1 c0

It will obviously have a maximum result of 1001 or 9 at this point.

[URL]http://173.212.220.214/img/Multiplier.Png[/URL]

I also found this schematic, that looks a bit more promising, and seems to be a 4 bit multiplier already, that is expandable.

"[URL
http://www2.elo.utfsm.cl - Figure 5.29[/URL]

So, now I just need to figure out what the "excess three" approach is, and how to employ it.

:D

 

[Kenneth Mann]

So, now I just need to figure out what the "excess three" approach is, and how to employ it.
:D

I went back and looked at it, and now I believe that your original approach (add "3" if more than "4") may be an easier approach.

What they are doing is eliminating the need to do the final computation in decimal when converting from binary to decimal. This eliminates the need for any type of decimal adders. The down-side is the fact that it requires comparators.

All you would need otherwise for conversion is a simple BCD adder. Excess-3 and other types are not necessary because there is no need to subtract when converting.

KM

 

[Michamus]

Hi again.

With your advice of the "add 3 if equal to 5 or greater" method, I decided to hash out the schematic.

The following image shows the macro I constructed with 100, or 4 as it's input.

"[URL
Click to Enlarge.[/URL]​

The interrupt gate is disabled when it receives a "zero" input, and enabled when it receives a "one" input. In this case, the comparator gave a 5> result, and disabled the "through" interrupt gate, thus allowing 0100 to proceed. The comparator also sends a "one" signal to the "4 bit adder" interrupt gate. The signal is distinguished via a single NOR gate for the adder interrupt, and OR gate for the through interrupt.

The interrupt gate is constructed from a single AND and XOR gate, with the input feeding the AND and XOR, the AND feeding the second XOR input, and the interrupt command feeding the second AND input, as pictured below.

http://173.212.220.214/img/projects/4 Bit Interrupt.Png​

As you can see, the signal that is attempted to be transferred is 1000, but is interrupted by the bottom "one" input, and becomes 0000, thus clearing the following OR gates for the adder's new input, which predictably will be 1011, as you will see here.

"[URL
Click to Enlarge.[/URL]​

I did notice that I seem to have wired the entire circuit upside down from the suggested orientation in the University of Pennsylvania document I used for the original concept.

I suppose I would only need to flip the wires prior to pinning their input/output orientation?

 

[Kenneth Mann]

It appears to me that what you are doing with the two four-bit "interrupt units" and the the OR gates, is to implement a simple four-bit two-to-one bit multiplexer. For each pair of lines to be multiplexed, this is usually done with a pair of ANDs feeding into an OR. The ANDs are enabled using a line to the ANDs on one side, with the inverted signal going to the ANDs on the other side. Sorry I can't illustrate this, but I used up my allotment of attachments in a little series I did on Karnaugh maps.

KM

 

[Michamus]

It appears to me that what you are doing with the two four-bit "interrupt units" and the the OR gates, is to implement a simple four-bit two-to-one bit multiplexer.

This is pretty much what I am trying to do. I'm still new to digital logic, but it seemed to me that simply preventing the information from reaching the OR gates would be a simple solution.

For each pair of lines to be multiplexed, this is usually done with a pair of ANDs feeding into an OR. The ANDs are enabled using a line to the ANDs on one side, with the inverted signal going to the ANDs on the other side. Sorry I can't illustrate this, but I used up my allotment of attachments in a little series I did on Karnaugh maps.

KM

Is this what you are referring to? I am honestly unsure if this is even remotely close.

[URL]http://173.212.220.214/img/projects/multiplex.png​

[/URL]

I really appreciate all the help you have provided me so far. You've provided quite a bit of insight.

 

[Kenneth Mann]

I apparently have no attachments left to upload, so I can't show it. Basically, each of the (four) selectors is made up of two ANDs into an OR. The "A" side signal goes to one AND and the "B" side signal to the other. The "control" signal goes directly to one AND and through an inverter to the other AND. There may be four of these Muxes, or eight, or as many as desired, all driven by the same control (and its inversion). Thus to mux two four input line signals would require eight ANDs and four ORs (or alternatively, twelve NANDs).


KM

 

[Kenneth Mann]

If someone could arrange for more downloads, or to offload the Karnaugh Map series to another site, I would be able to put in more.

KM

 

[Kenneth Mann]

I am not certain of what the "ROMs" are being used for.

KM

 

[Kenneth Mann]

http://www.datasheetcatalog.org/datasheets/400/331354_DS.pdf" is a datasheet for a quad two to one mux. It is an old TTL implementation, but it shows the logic. Notice that it has two control inputs. The select input has two inverters in-line. This just provides buffering; one could do but isn't as good. The other line simply serves as an "enable" input.

KM

 

[Michamus]

I am not certain of what the "ROMs" are being used for.

KM

The ROMs are being used as make-shift data inputs. I'm just using them each as a 1bit ROM. When the project is complete, they will be removed and the lines will be pinned as inputs.

I apparently have no attachments left to upload, so I can't show it. Basically, each of the (four) selectors is made up of two ANDs into an OR. The "A" side signal goes to one AND and the "B" side signal to the other. The "control" signal goes directly to one AND and through an inverter to the other AND. There may be four of these Muxes, or eight, or as many as desired, all driven by the same control (and its inversion). Thus to mux two four input line signals would require eight ANDs and four ORs (or alternatively, twelve NANDs).

Ah, thank you very much. This component seems to work quite well, and will more than adequately replace my two interrupt components, and the 4 OR gates. Now all I have to do is integrate it. :D

Also, if you need a website to store some images on, I have a personal website on a dedicated server that I could upload those attachments to. Another option you have is to open a photobucket account. I'm pretty sure they're still free. I've had one myself for years.

You could also setup a free website with one of the various free hosts that are out there.

Just some ideas.

 

[Michamus]

Well, I reformatted the circuit using the multiplexer, and it works great! It looks a lot cleaner in my opinion.

Here's some images.

[URL]http://173.212.220.214/img/projects/new-macro_high.png​

[/URL]

This is the "Add 3 if equal to or greater than 5" macro set to 7, or 111. The multiplexer does it's job beautifully, and selects the adder input for the new output of 10 or 1010.

[URL]http://173.212.220.214/img/projects/new-macro_low.png​

[/URL]

In this image, the input is set to 3, or 11. As this is less than 5, the comparator sets the multiplexer to allow the 11 as the output.

This is an exact replica of the multiplexer you linked me. I really appreciate this insight, as it really optimized the macro circuit.

[URL]http://173.212.220.214/img/projects/2-to-1-line-multiplex.png​

[/URL]

 

[Kenneth Mann]

I am putting together an alternative; a straight decimal to BCD converter, not using the described "algorithm" approach. I will attempt to send it directly to you through PF. They have a method, if you accept it. It will probably be ready in about three days.

KM

 

[Michamus]

I am putting together an alternative; a straight decimal to BCD converter, not using the described "algorithm" approach. I will attempt to send it directly to you through PF. They have a method, if you accept it. It will probably be ready in about three days.

KM

Wow. That sounds terrific! I can't wait to see what you come up with.

:D

 

[Michamus]

It's complete. I ran into a little bit of a hangup with the display not working properly.

It turns out I hadn't set the inputs b2 and b3 as "0" on the 4bit adder within the "add 3" macro. This seems to have caused a glitch causing it to add 5, instead of just 3. No worries, as it was easily resolved.

Here is an image of the completed project:
http://173.212.220.214/img/projects/complete-7bitadder-to-7seg.png"

Bear in mind that the 7bit adder outputs are in order with the least at the bottom, and the greatest as the top output. The output should be read as " 11111110 ". The zero input on the bottom is the carry input.

 

[Kenneth Mann]

I want to say that I have a (reasonably) finished sample of the conventional decimal to BCD converter (32 bit), finally, after it took a bit longer than planned (for several reasons) and a week-long delay caused by the yearly call of socialism. I also have a problem; in that I have run out of my allotment of attachments and can't put it up here. If someone is willing to take it and post it for me I can then explain it. PF has means (which I don't quite fully understand) for making such transfers.

KM

 

[Michamus]

Hi again Kenneth!

If you want, you can e-mail the pictures to me and I'll upload them to my website. I'll just shoot their address to you, and you can link them in your posts. Give a little bit, and I'll see if I can set up ftp access for you, and you can just start using my site without the need of e-mailing me.

Don't worry about file size, or bandwidth, as it's an unlimited dedicated server.

I'll PM you my e-mail address.

 

[Kenneth Mann]

I uploaded the working circuit on the "http://www.logiccircuit.org/forum/viewforum.php?f=4"" website. See if you can download it and get it to work. I included simple user instructions, but there is more you may want to look into. I still hope to put pictures on the PF website.

KLM