- #1
Excom
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Hi
I am trying to make a Si nanowire MOSFET and in this process I have to etch the toplayer of a SOI wafer.
I have made some reactive ion etching (RIE) experiments on Si wafers and obtained an etch rate of 550 nm/min. SF6 have been used as the feedstock gas.
However, when trying to etch the to Si layer on a SOI wafer the etch rate is reduced to 10 nm/min. Is there anyone that can explain this lowering of the etch rate when going form a Si wafer to a SOI wafer? Or is there anyone that have a good recipe for RIE etching of SOI wafers?
I am trying to make a Si nanowire MOSFET and in this process I have to etch the toplayer of a SOI wafer.
I have made some reactive ion etching (RIE) experiments on Si wafers and obtained an etch rate of 550 nm/min. SF6 have been used as the feedstock gas.
However, when trying to etch the to Si layer on a SOI wafer the etch rate is reduced to 10 nm/min. Is there anyone that can explain this lowering of the etch rate when going form a Si wafer to a SOI wafer? Or is there anyone that have a good recipe for RIE etching of SOI wafers?