- #1
Sinister
- 33
- 0
Hi guys.
I'm wondering if someone could explain why when trying to make a 3 bit up/down counter using T flip flops, there are two and gates connected to the final multiplexer ?
Can someone explain how you approach this?
And same with the JK Flip flop but with an xor gate.
I'm really confused on how you come up with this.
Thanks.
I'm wondering if someone could explain why when trying to make a 3 bit up/down counter using T flip flops, there are two and gates connected to the final multiplexer ?
Can someone explain how you approach this?
And same with the JK Flip flop but with an xor gate.
I'm really confused on how you come up with this.
Thanks.