Need help designing ADC system -

[envanyatar]

Need help designing ADC system - URGENT!

I have to design a system where an analog input is converted to a digital output which will be sent to a parallel digital data bus using a ADC chip.

the specifications are that the input should be between 300-3200Hz with a digitisation error of 1%. for this do i use a band pass filter or a low pass only? how do you maintain under 1%? is it by choosing the number of bits?

also, the sample rate is to be taken at 8kHz. but the the rates in the Chips are all very much higher than this. How do you control that?

if a basic block diagram is to be drawn, should it be like this?

analog input, filter, sample and hold, ADC, (timer?? to control the sampling rate??), (shift registers? to convert from series to parallel??), digital data bus

 

[berkeman]

What textbook are you learning about ADC systems from? A good source of information is the manufacturers who make the ADC chips. It's in their best interest to help you design a good circuit using their chips, so their Application Notes sections are usually full of great info and help.

I checked out Analog Devices website, and they have a long list of helpful Application Notes:

http://www.analog.com/en/DCcList/0,3090,760%255F%255F43,00.html

Start with a basic one like AN-282, and then look for notes that may fit your device or system requirements.

 

[ravenprp]

First of all, it is important to understand the purpose and requirements of the ADC system you are designing. Based on the given information, it seems like you need to design a system that can accurately convert an analog input signal into a digital output that can be transmitted via a parallel digital data bus. The specified input range and digitization error of 1% suggest that you will need to use an ADC chip with appropriate resolution and sampling rate.

To answer your first question, whether to use a bandpass or low pass filter will depend on the specific signal you are trying to convert. A bandpass filter will allow only the desired frequency range (300-3200Hz) to pass through, while a low pass filter will attenuate any frequencies above the desired range. It is important to choose the appropriate filter to ensure that the signal is clean and free of any unwanted frequencies.

To maintain the digitization error under 1%, you will need to select an ADC chip with a high enough resolution. The number of bits will determine the resolution, so a higher number of bits will result in a more accurate conversion. However, it is also important to consider the trade-off between resolution and cost when selecting an ADC chip.

As for the sample rate, you can use a timer to control the sampling rate of the ADC. The timer can be programmed to trigger the ADC at a specific frequency, in this case 8kHz. This will ensure that the ADC is sampling the analog signal at the desired rate.

For the basic block diagram, your initial idea is correct. You will need an analog input, a filter, a sample and hold circuit, an ADC, and a timer to control the sampling rate. The use of shift registers will depend on the specific requirements of your system, but it can be used to convert the digital output from the ADC into parallel data for transmission via the digital data bus.

I hope this helps guide you in designing your ADC system. It is important to carefully consider all the requirements and select appropriate components to ensure the accuracy and functionality of your system. If you need further assistance, it may be helpful to consult with an electronics engineer or seek out additional resources online. Good luck with your design!