How can I design a sample and hold circuit to produce a desired waveform?

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In summary, the circuit is not connected correctly and the gate drive for the FET looks wrong. The purpose of R2 is not clear.
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syee10
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Sample and Hold Circuit Help!

Hi all,

I am designing a simple sample and hold circuit where the input is a sinusoidal analog input and it is control by a TTL compatible square wave (waveform A). The result waveform i should get is waveform B in the attach file but i tried a millions time i still can't get the same waveform. Someone there can help me out? I had attached all the file in the attachment..
 

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  • #2


syee10 said:
Hi all,

I am designing a simple sample and hold circuit where the input is a sinusoidal analog input and it is control by a TTL compatible square wave (waveform A). The result waveform i should get is waveform B in the attach file but i tried a millions time i still can't get the same waveform. Someone there can help me out? I had attached all the file in the attachment..

The gate drive for the FET looks wrong. Drive it high and low to sample and hold. Do not connect the gate to the input... ?
 
  • #3


The gate is connected to a reference signal logic input. The analog input is connected to pin 5...
 
  • #4


syee10 said:
The gate is connected to a reference signal logic input. The analog input is connected to pin 5...

Hmm. I guess I'm not understanding the connections. What is the purpose of R2? Why is there a "switch" in series with the gate? You don't ever want to float a gate...
 
  • #6


syee10 said:
I construct the circuit from the following reference..
http://mysite.du.edu/~etuttle/electron/elect25.htm

Is the circuit itself connected wrongly?

From your link:
For our purposes, we can command sample and hold by connecting a wire manually to -12 for HOLD, and leaving it disconnected for SAMPLE. For a practical circuit, we would make better arrangements for the control.

Emphasis added by me. And in your schematic implementation of the circuit in the link, the switch you have in the gate lead is misplaced. It should go from the bottom of R2 (which should be connected directly to the gate) to the -12V supply. The link implies that this simple switch can be used to force a HOLD (when closed), and allow the SAMPLE phase when open. The 1M resistor will limit the bandwidth of the sampling circuit to a few kHz, probably.
 
  • #7


Thanks for your help =)
 

1. What is a sample and hold circuit?

A sample and hold circuit is an electronic circuit that takes a snapshot of an input signal and holds that value until the next sample is taken. It is commonly used in analog-to-digital converters to prevent changes in the input signal from affecting the accuracy of the conversion.

2. How does a sample and hold circuit work?

A sample and hold circuit typically consists of a switch, a capacitor, and an operational amplifier. When the switch is closed, the capacitor charges to the voltage of the input signal. When the switch is opened, the capacitor holds that voltage while the amplifier amplifies it to a level suitable for further processing.

3. What are the main applications of a sample and hold circuit?

Sample and hold circuits are commonly used in analog-to-digital converters, signal reconstruction, and data sampling. They are also used in radar systems, digital audio equipment, and other applications where accurate sampling of an analog signal is required.

4. What are the advantages of using a sample and hold circuit?

Sample and hold circuits provide accurate sampling of analog signals without distortion or interference. They also have a fast response time and low power consumption. Additionally, they can hold the input voltage steady, even if the input signal changes, which is crucial for accurate analog-to-digital conversion.

5. What are the limitations of a sample and hold circuit?

One of the main limitations of a sample and hold circuit is that it can introduce noise and distortion to the signal if not designed properly. Additionally, it may not be suitable for high-frequency signals due to the limitations of the switch and amplifier. Moreover, the capacitor may discharge over time, affecting the accuracy of the sampled signal.

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