JFET Biasing in Cascode: Designing a High Input Impedance Differential Amp

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In summary, the blue wire should be left in place to short the input to the output, and high value resistors should be placed between the gate and the bottom of the bias resistor.
  • #1
SadScholar
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Hi, I'm trying to design a simple differential amp with extremely high input impedance. I'm using a couple of JFETs at the input stage to accomplish this. However, because I'm sending the signal from there to a differential amp, I don't want any DC offset, but I'm a little bit confused about how to bias J1, the first JFET. Basically my question is, should the blue wire be there. Even assuming I am dealing with two JFETs on the same silicon chip, and using the same value for both resistors, if I leave out that blue wire, I get a DC offset. But if I leave that blue wire in, I get almost no current through the bottom JFET and resistor, which is confusing to me. Any insight would be appreciated.
Here is the circuit diagram:
http://i516.photobucket.com/albums/u324/chrysolite13/CascodeCircuit.png
 
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  • #2
SadScholar said:
Hi, I'm trying to design a simple differential amp with extremely high input impedance. I'm using a couple of JFETs at the input stage to accomplish this. However, because I'm sending the signal from there to a differential amp, I don't want any DC offset, but I'm a little bit confused about how to bias J1, the first JFET. Basically my question is, should the blue wire be there. Even assuming I am dealing with two JFETs on the same silicon chip, and using the same value for both resistors, if I leave out that blue wire, I get a DC offset. But if I leave that blue wire in, I get almost no current through the bottom JFET and resistor, which is confusing to me. Any insight would be appreciated.
Here is the circuit diagram:
http://i516.photobucket.com/albums/u324/chrysolite13/CascodeCircuit.png

Your blue wire would appear to short the input to the output, no?
 
  • #3
Hah, that explains why it removes the offset.
 
  • #4
There should be high value resistors from the gate to the bottom of the bias resistor for both FETS. So cut your blue wire and put a 100 K resistor in there.

But wouldn't you drive the bottom one and bypass the gate on the top one?

This would give more gain.
 
  • #5
The attached is the schematic of TL081 JFET Opamp. Does that help?
 

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What is JFET Biasing in Cascode?

JFET Biasing in Cascode is a method of biasing a cascode circuit, which is a configuration of two transistors stacked on top of each other. The upper transistor is a JFET, and the lower transistor is typically a bipolar transistor. This method is used to improve the performance of the circuit by reducing the effects of the JFET's non-linear characteristics.

Why is JFET Biasing in Cascode used?

JFET Biasing in Cascode is used to improve the linearity and stability of the cascode circuit. By using a JFET as the upper transistor, the effect of its non-linear characteristics is reduced, resulting in a more linear overall circuit. This method also helps to minimize noise and improve frequency response.

How is JFET Biasing in Cascode achieved?

JFET Biasing in Cascode is achieved by connecting the gate of the JFET to a fixed voltage source, typically through a resistor. This sets the JFET at a constant bias point, allowing it to operate in its most linear region. The lower transistor is then biased separately to provide the desired amplification and current flow.

What are the advantages of using JFET Biasing in Cascode?

Using JFET Biasing in Cascode offers several advantages, including improved linearity and stability, reduced noise, and better frequency response. It also allows for a wider range of operating voltages and currents, making it versatile for various circuit designs.

Are there any disadvantages to using JFET Biasing in Cascode?

One potential disadvantage of JFET Biasing in Cascode is that it requires more components and a more complex circuit design compared to other biasing methods. It also may not be suitable for high-power or high-frequency applications. Additionally, careful selection of the JFET and bipolar transistors is necessary to ensure proper matching and performance.

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