LTSpice Clock signal distortion


by salil87
Tags: clock, distortion, ltspice, signal
salil87
salil87 is offline
#1
Dec14-13, 01:15 PM
P: 27
Hi
I made a counter using Dflop in Ltspice. But when I am using the count bits as signal to other circuits the clock signal is getting distorted. Why is this happening? How can I overcome this problem?
Thanks
Salil
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analogdesign
analogdesign is offline
#2
Dec14-13, 01:23 PM
P: 375
You might be loading the Dflops too much. Try putting buffers between the counter output bits and whatever circuit they are driving.
jrive
jrive is offline
#3
Dec16-13, 08:43 AM
P: 37
can you post your LTSpice schematic and results showing the distorted clock?


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