The Physics of a Computer Processor

[anubhab123us]

Hello,I am a student attending Highschool and I was assigned in my modern physics class(2nd year physics course) to do a presentation in front of the whole class about the physics of computer processors. I know that it has a lot to do with electricity magnetism because it sounds like it would and my teacher said something about it. I searched the internet but I can't seem to find anything that deals with the physics of processors or how they work.Can someone please explain all you know about it or direct me to a link which is very useful. Thanks guys!

 

[Digit]

I don't know if this will help or hurt.
A computer processor is two machines, working on a linear, circular memory. (RAM)
There is a fetch machine that can crawl up and down the RAM and present the data in the RAM to the decode machine.
The decode machine does the actions ruled by the RAM content.

The actions are:
1.Fetch at address k
2.Decode k ;(These are the op codes of the processor)
3.Do the action of (k) ;One of the actions is to change k)
4.k = k + 1
5.Go to 1.

Nothing moves in the processor except currents. Currents are moving charges. The smallest element in the processor is a transister.
This is sort of what a computer processor is. I have no idea what it is as a physical object.

 

[Gara]

its all about logic gates. anything which can have only 2 states of being. such as yes/no, on/off, circle/square.

the old logic gates where valves. those big huge things in old TV's. back in the day when valves where used as logic gates they used to fill WHOLE rooms with them, get about 1200 logic gates! oooh!

now adays, the logic gates are replaced by silicon, and can get about several million on the end of your finger.

thats all the help i can give right now. almost 3 am

 

[TillEulenspiegel]

A processor (CPU) is a group of specialized circuits that have dedicated functions. At the lowest level each circuit is composed of many transistors ( 55 million in a pentium 4 ) . The transistors are like a water pipe from the city (source) into your house (drain) with a valve (gate ) in between. The transistors used today are exceedingly small and are mostly MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) a block of silicone with electrodes at each end (source and drain ) with a third in the middle (gate ) attached to a different kind of doped metal , when current is applied to the gate a magnetic field is produced and the "valve" is closed when and no current flows from the source to the drain. When no current is applied to the gate then the current flows from the source to the drain. The flow of current represents a 0 and no flow represents a 1.

That's about all the machine is from a physics standpoint . If you need parts of the CPU and the way they work or programing that can be easily explained . Manufacturing may be a concern also.

 

[chroot]

Ick, well, there are some problems with that description of a MOSFET. It is entirely accurate to say they are like "valves" for current, but your description of their operation is quite wrong.

Current does NOT flow through the gate. All you need to do is apply a potential to the gate. The gate is insulated from the substrate by a layer of SiO2 (silicon oxide).

There exists a doped channel of silicon between the source and drain. Because (in an n-channel FET) the source and drain regions are p-type semiconductor, while the channel is n-type semiconductor, there exists a depletion region in the channel that prevents current flow. When you apply a potential to the gate, you create an electric field across the channel (nothing magnetic!). The electric field, if applied in the correct direction, serves to reduce the depletion region, allowing charge carrier to flow. Applying a potential to the gate opens the valve.

I should also mention that in most digital logic families, voltages, not currents, determine logic states.

- Warren

 

[TillEulenspiegel]

Acck (_8-(l)

Chroot : "Current does NOT flow through the gate. All you need to do is apply a potential to the gate. The gate is insulated from the substrate by a layer of SiO2 (silicon oxide)."

I didn't say it did , I said that current flows to drain from source , and YOUR description of a MOSFET is wrong there is no npn junction there is a contiguous block of silicone with the gate electrode attached thru a metallic oxide to the block at mid center. not to the substrate, which is the neutral silicone on which the active parts of the transistor rest ( are actually etched out by UV light ..shall we go into depth with that too? ) ..a foundation no more.
For a discripition : " http://www.play-hookey.com/semiconductors/depletion_mode_mosfet.html "

As far as the depth of the description I don't think a 2nd yr H.S. Physics student needs to go into doping,depletion and enhancement zones and a description of that device on a quantum level. As far as the use of the word Magnetic, pedantically I was 1/2 correct as I have been reviewing Maxwells EM tensor and had it on my mind. I should have said an EM field.

This is not the first time you have objected to a posting of mine and not the first time you were wrong, is this your typical behavior? If so I recommend a thorough review of the posting that you object to and a greater understanding of the subject at hand.

 

[chroot]

You can't even spell "silicon," and you're telling me a MOSFET has no p-n junctions? Give me a break. I'm an electrical engineer, and I work for National Semiconductor.

Your link describes a depletion-mode FET, which are practically never used. Look up an enhancement-mode FET, and tell me what you find.

- Warren

 

[chroot]

I might also mention the following errors in your post, though it's kinda pointless:

1) the metal layers for the gate, source, and drain are not connected to the semiconductor through "metal oxide."

2) the substrate is not "neutral," whatever that means. The substrate cannot be intrinsic (undoped) semiconductor because you wouldn't be able to control current flow through it. It's typically p-type semiconductor, but depends on what kind of tubs you're using to isolate the transistors.

3) the "active parts" of the transistor do not rest above the substrate. They are embedded within it. The substrate is itself an "active part."

...but whatever.

- Warren

 

[dlgoff]

by TillEulenspiegel
MOSFETs (Metal Oxide Semiconductor Field Effect Transistors

If memeory serves me correctly, MOS means metal oxide surfice. That's correct isn't it chroot?

 

[TillEulenspiegel]

Chroot : "You can't even spell "silicon," and you're telling me a MOSFET has no p-n junctions? Give me a break.

Your link describes a depletion-mode FET, which are practically never used. Look up an enhancement-mode FET, and tell me what you find."

The description offered was of an older depletion mode MOSFET and was entirely consistent to my description (and link ) which is easy to understand and that was the main switching model used in the Intel 8086,8087 (numeric co-processor) and the 8088. These are now primitive examples of the science of fabrication and design but are easily understood. I did not post my answer to be in some sort of pissing contest but rather trying to help a HS student with a project at an ACCESSABLE level. Actually neither type is used any more in the construction of CPUs they use NMOS, PMOS transistor elements that have many active elements of differing meterial and 10 or so masks, what do you think that would mean to a normal student?

Chroot: "I'm an electrical engineer, and I work for National Semiconductor."

Well that's fascinating I'm a double e also and I hope the posts we see here from You are not indicative of the work that You do for your employer. You seem to be defensively argumentative.

Chroot "1) the metal layers for the gate, source, and drain are not connected to the semiconductor through "metal oxide."

Hmm perhaps I made a typo but You demonstrate a consistent inability to read evidently. I did not say they were I said the gate electrode is connected to the silicon block thru a "Metallic oxide". This definition is specific to the rudimentary device I was explaining.

Chroot :"2) the substrate is not "neutral," whatever that means. The substrate cannot be intrinsic (undoped) semiconductor because you wouldn't be able to control current flow through it. It's typically p-type semiconductor, but depends on what kind of tubs you're using to isolate the transistors."

The majority of substrates of modern VLSI circuits are insulators not conductors, SOI ...look it up.

Def: The body or base layer of an integrated circuit onto which other layers are deposited to form the circuit. The substrate is usually Silicon, though Sapphire is used for certain applications, particularly military, where radiation resistance is important. The substrate is originally part of the wafer from which the die is cut. It is used as the electrical ground for the circuit.
The fact that most wafers are grown from N type silicon notwithstanding.


Chroot : "3) the "active parts" of the transistor do not rest above the substrate. They are embedded within it. The substrate is itself an "active part.""

The cross section of NMOS and PMOS structures in CPUs FPGAs, PLAs, are all "built" ( deposited ) on the substrata which, other then a ground plane is NOT a part of the active area of the transistor. The student did not need to know the most complicated details of the latest devices like shallow channel and bifurcated or dual gate structures to explain ..a wall switch.

So once again You are incorrect in interpretation , intent and factually.

edit syntax

 

[chroot]

Originally posted by TillEulenspiegel
Actually neither type is used any more in the construction of CPUs they use NMOS, PMOS transistor elements that have many active elements of differing meterial and 10 or so masks

NMOS and PMOS just refers to the channel polarity. Virtuall all are enhancement-mode MOSFETs. NMOS devices have a n-type channel, PMOS devices have a p-type channel.

Well that's fascinating I'm a double e also and I hope the posts we see here from You are not indicative of the work that You do for your employer. You seem to be defensively argumentative.

You seem to be trying to educate yourself on the fly by reading websites. You obviously don't really understand the material yet. If you don't know something, just be quiet. I have no idea why you continue to argue with me about things you just learned off a website this morning.

I did not say they were I said the gate electrode is connected to the silicon block thru a "Metallic oxide".

Hmm, you didn't say that? You said "there is a contiguous block of silicone with the gate electrode attached thru a metallic oxide to the block." Could've fooled me.

The majority of substrates of modern VLSI circuits are insulators not conductors, SOI ...look it up.

The subtrates of all ICs are neither conductors nor insulators -- they are semiconductors.

It is used as the electrical ground for the circuit.
The fact that most wafers are grown from N type silicon notwithstanding.

Both of those statement are inconsistent with your assertion that the subtrate is an "insulator." Once again, you obviously just have no idea what you're talking about, and you're picking things up piecemeal just to try to prove me wrong somewhere. It won't happen. I've taken a full year of graduate-level semiconductor device physics classes in university, I've worked in the semiconductor industry for several years, and I know what I'm talking about (in this field, at least).

The cross section of NMOS and PMOS structures in CPUs FPGAs, PLAs, are all "built" ( deposited ) on the substrata which, other then a ground plane is NOT a part of the active area of the transistor.

So circuits don't need ground to function now? I see.

So once again You are incorrect in interpretation , intent and factually.

I think the word you're looking for is "factuality."

Thanks for playing. Give it up, or I'll just lock this thread and put it out of its misery.

- Warren

 

[chroot]

Originally posted by dlgoff
If memeory serves me correctly, MOS means metal oxide surfice. That's correct isn't it chroot?

Nope, it means "metal-oxide-semiconductor," which refers to the three layers involved -- a layer of semiconducting material, over which is laid is a layer of insulating silicon dioxide, over which is laid a layer of metal. A MOS sandwich.

- Warren

 

[Hermes]

Quantum Processing

Here is a suggestion, study quantum tunneling and then describe a processor
from that prospective.

 

[jackle]

So, all this leaves a very clear, simple and easy answer for our guest to go away with :)