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In logical gates - can I combine signals without a gate?

by Femme_physics
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CompuChip
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Feb8-12, 06:16 AM
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And what exactly should that do?

E.g. what if (A & B) is high and (B & C) is high?
Or one is high and the other is low?
sophiecentaur
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Feb8-12, 06:30 AM
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There are two answers to your question.
Firstly, it's not good practice to 'break the rules' of logic circuitry. That's the correct answer for 'the student'.
Secondly, when you combine outputs for some logic technologies, you can sometimes produce an OR or an AND function (depending on which family you are using). If you try to combine outputs from CMOS, for example, the two outputs will 'fight each other' and either produce a non-logic level or some smoke.

People have been known to use diodes to combine some families of gates safely('diode logic') but stuff is so cheap these days that it's just not worth messing about. You may as well do it 'properly' and get a predictable result with a few extra gates..

Ouabache
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Feb8-12, 06:32 AM
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In logical gates - can I combine signals without a gate?

Hi FP
I think you will be able to answer your own question, if
you think of it this way.
When the outputs of your upper gate and lower gates
are equal, then the combined output can be predicted.
However, if the output of your upper gate is a logical high
(e.g. 3v) and the output of your lower gate is
logic low (0V), what would your combined output be?
Would the 3v be pulled down to Ov?
Would the 0v be pulled up to 3v? Would you have something
in between or ??
Femme_physics
#5
Feb8-12, 07:38 AM
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CompuChip- that's exactly what i'm trying to figure out. If I knew the answer I wouldn't have asked :)

Sophie - I do wish to follow the students rules, since I am one. So I wanted to know if I am allowed or not at all to do it. I don't recall studying about CMOS, though.

Quab- I don't know how to relate voltages to signals right now. We only worked with A B C and D...

Er, I fear you guys are a bit ahead of me..I do knOw finding outputs of logical gates via numberless functions..
vk6kro
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Feb8-12, 09:49 AM
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You might be able to do that with open collector outputs that share a common load. Normal gates cannot have their outputs paralleled because the result would depend on which could supply the most current or sink the most current.

A better way with standard gates is to take the output of the top gate and feed it into the input marked "B" on the lower gate.

This would give you a legal 3 input AND gate with the bottom gate being the only output.
sophiecentaur
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Feb8-12, 10:22 AM
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Quote Quote by Femme_physics View Post
Sophie - I do wish to follow the students rules, since I am one. So I wanted to know if I am allowed or not at all to do it. I don't recall studying about CMOS, though.
Definitely not!! The schematic you drew doesn't specify the nuts and bolts of the logic so stick to the rules and avoid going wrong.
Such misbehaviour is the equivalent trying to calculate 2+or - 2 = ?

When you go on to build your own stuff you will take liberties, no doubt - but no one will be marking the results!
Ouabache
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Feb8-12, 02:25 PM
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Quote Quote by Femme_physics View Post
Quab- I don't know how to relate voltages to signals right now. We only worked with A B C and D...
That's okay, if you are only working with logic theory so far, then I would say, no, it is not allowed to combine outputs the way you described. (good question)
I was just trying to let you come to the same conclusion. If these two gates
were inside a computer and wired up as you suggest, when the gate outputs differ (one hi=1, other low=0) then it will put both a 1 and 0 onto the bus (conductive lines between components), simultaneously. The result is unpredictable, so this configuration should not be used.
CompuChip
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Feb8-12, 03:06 PM
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Quote Quote by Femme_physics View Post
CompuChip- that's exactly what i'm trying to figure out. If I knew the answer I wouldn't have asked :)
Well, that is my point exactly.
If there is no obvious answer, then you will have set a convention or definition, or whatever you want to call it. And wherever there is a convention, there will be people using an opposite convention, and confusion arises.

In this case, I would say the intuitive choices are:
(1)
high + high ==> high
high + low ==> low
low + low ==> low

or

(2)
high + high = high
high + low = high
low + low = low

If you make choice (1), you are basically saying that every "implicit" connection is actually an AND gate, and you can just as well draw one so everyone knows what you means (or you could leave out all the AND gates in your drawing, so that everyone gets confused).
And if you made choice (2), you can read the previous sentence again with AND replaced with OR.
NascentOxygen
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Feb11-12, 03:52 AM
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can I combine signals without a gate?
The short answer is NO!
A more detailed answer is DEFINITELY NOT!
But when you are a final year student, working on your own project and with a good understanding of the electronics that lies behind those cute gate symbols, you might consider doing so. But you'd better have a good reason to justify it!

BTW, such an arrangement has a name, it is called a wired-OR gate, or a wired-AND gate, depending on the function it performs.

But, realistically, you will never need to use it. Best to forget about it.
sophiecentaur
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Feb11-12, 04:09 AM
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Logic circuits are essentially non linear because they only deal in discrete levels of signal (e.g. 0 and 1). To 'combine' them must involve something other than a pair of resistors or just a wire connection, which would give you results like
0+0=0
1+0=1
1+1=2
1+0=1

Because currents add Arithmetically. You don't want regular arithmetic - you want Logic functions with just 1 or 0 for an answer. Wires don't achieve this.
When a 'wired OR' happens to work, there is a lucky form of logic design that just happens to allow it.
BAD practice, as a rule. You can end up with a 'perhaps' gate.
Antiphon
#12
Feb11-12, 01:00 PM
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The logic diagram does not permit it, period.

The various ways to get away with it using actual circuits have been described, but these would belong on an electrical schematic, not a logic diagram.

For example, if you tie two open-collector outputs in a circuit, you have created an additional logic gate in the logic diagram.

So no, it can't be done.
Femme_physics
#13
Feb12-12, 04:58 AM
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Thanks for the clear cut answer, guys, I shan't do it then :)
Femme_physics
#14
Feb12-12, 05:26 AM
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I have another question. Can a signal start flipped?

i.e.




Or is it against the rules?
I like Serena
#15
Feb12-12, 05:48 AM
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Yep. A signal can start flipped.
There's no rule against it.


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