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Why do you need an ESR for the capacitor to create a voltage ripple? Just the capacitor on its own receiving the AC component of the inductor current will charge it up, thereby creating a voltage ripple.

I think I am getting confused between voltage ripple and current ripple. The LC filter will severely attenuate voltage ripple at the switching frequency and the harmonics, for any bit of voltage ripple left over, we use the small-ripple approximation and say it is zero. However, the current...

I am reading a book 'Fundamentals of Power Electronics' - Erickson. The book begins with a buck converter and the assumptions that we use so that we do not have to deal with 2nd order equations. I will first explain what the book says What the book says? The book says that the LC filter of a...

Sorry, I apologies for not posting correctly. Fundamentals of Electric Circuits Book

Homework Statement:: This isn't a homework question but just a theoretical questions. [mentor’s note: moved to a more appropriate forum for theoretical questions.] I know that current is defined as the rate of change of charge per unit time. i = dq/dt This makes sense for a capacitor which...

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I would like to ask about the behavior of a MOSFET as a capacitor, particularly at the onset of inversion/weak inversion - see Fig 2.6(c) At this stage in Fig 2.6(c), there is positive charge at the gate metal/poly contact, then an insulator oxide and then negative ions (positive holes have...

Homework Statement:: Hi, It's been a while since I have reviewed my basic semiconductor physics and I have some doubts. In a P-Type doped semidoncutor material, I understand that Group III elements such as Boron are added to a Group IV element such as Silicon and thus the Boron atom has one...

Awesome! Thank you very much!

Thanks very much. One last thing, the voltage on Vref should always decrease right? Even in the case where we switch capacitor C1 from Vref to GND (rather than C2 from GND to Vref) and leave everything else the same.

First, I calculate the jitter power with an equation given in the book Next, I calculate the signal power Now, I know that SNR = Psignal/(Pjitter + PthermalNoise), However, I seem to be getting a negative value for the thermal noise power?? My plan was to use this thermal noise power and...

Also, shouldn't C123 = C1 +C2 +C3 = 32fF + 32fF + 16fF = 80fF rather than 64fF?

Ah, I see. Let me try it by hand now. Also, side question. Is there any way to use charge redistirbution to do this? I thought that charge redistribution always applies. I tried it with my method that I stated in a previous post, answers look reasonable except they go in a opposite direction...

Why is V123 = 2Vin - Vref? I understand the Vin-Vref voltage is what capacitors C1 and C3 had in the start and after. I also understand that as soon as you switch (at time t = t0+), that capacitor C2 still has voltage Vin across it, yet it is now in parallel with C1 and C3. Why are you adding...

Amazing. Thank you very much!

Thank you! I just had a thought. Can I still use the law of charge conservation like before but instead do it like this: Here is the new part, I relate the new central node voltage with the charge left from the reference capcaitor: And now, I equate the two - charge before and charge...

Ahh. So essentially you are saying that due to the difference in the initial voltages across the capacitors, the Vref source will supply charge to the other two capacitors. This charge supplied is what will cause the initial Vref and initial central common node of the two capacitors to change...

Hmm. I see. However, how do you have only 1 unknown. The Vin voltage on the central node (top plates of capacitors) will also change and so will Vref. Hence, don't you have two unknowns? Also, I'm a bit confused about this circuit when I think in terms of +Q and -Q charge. For example, if the...

Thank you for the detailed response. I'm having a hard time following that. In your analysis, Vref is a variable which I understand because charge redistribution will have an effect on it, however Vin is kept constant on the top plates of the capcaitors? During charge redistrbution, Vin is no...

My apologies. I forgot to mention one key detail that will change this answer. The reference voltage during the sampling phase is connected to a 1V voltage source to keep it topped up and to charge it back up from any voltage drop in previous conversions. I have updated my explanation below (it...

This is where my confusion usually comes in. A lot of people tend to argue that you can't think of M3 just as a resistor and I keep finding myself going back and forth between following I/V curves and these "resistor" explanations. I understand that M3 will appear as a resistor to small-signal...

I have a question relating DAC architectures. The guts of the question are really to do with capacitors and charge. I want to see if my understanding is correct. This is not a homework question or anything, just thinking about how the circuit interacts. Setup: Consider the following setup...

I see. So in the I/V characteristic plot, the slope increase (increase in Id for increase in Vds) in the saturation region is just to show the effect of the channel-length modulation right? And I shouldn't be using that here?

I don't understand. If you just look at M1. The gate-source voltage has increased, the current has increased. How is it possible that the drain voltage decreases? Surely, that pushes towards the linear/triode region?

The highlighted part is what I don't understand. Due to the gate voltage increase in M1, the current in the left branch should increase. That makes sense to me. However, he then says that the voltage at node F (in other words the drain of M1) decreases? How? Look at this plot: As current in...

EDIT: I just realized my mistake. When calculating input/output resistances, all independant sources have to be zeroed just like in Thevenin's Theorem, so that current source there shouldn't be there in my small-signal model. From that it's just one KCL and job done.

Homework Statement (From Razavi's Design of Analog CMOS Integrated Circuits - Chapter 6) Homework Equations The Attempt at a Solution Not too sure about calculating the input impedance of this. Initially I thought that it would be the series combination of C1 and C2, since we are...

Hmm good point. In that case then, I have another question. What about like a standard CS source stage with a current source like this How do these circuits operate then?

Homework Statement [Taken from Razavi's Design of Analog CMOS Integrated Circuits 2nd edition] Homework Equations The Attempt at a Solution [/B] I'm not too sure what to do with this question. Here's what I think of the circuit This doesn't look like a differential amplifier to me since...

Homework Statement Taken from Razavi's Analog CMOS IC design book. Homework Equations The Attempt at a Solution I'm attempting part (a) and I'm a bit confused. First I define 50mV away from triode region as follows (I took edge of saturation and brought it down by 50mV) $$V_{GD} = V_{TH}...

Homework Statement All MOSFETs (no JFETs) Ignore body effect. Is my gain correct? Just want to confirm. Homework Equations The Attempt at a Solution

Homework Statement Razavi's book (Analgoue CMOS Integrated Circuits) says that that "as Vin approaches Vth, M1 begins to turn on, drawing current from Rd and lowering Vout. Transistor M1 turns on in saturation regardless of the values of Vdd and Rd." Why is that? I mean that the condition...

Homework Statement Homework Equations The Attempt at a Solution I think that up there is right so far since I didn't see any other relationship between the two MOSFETS other than their IDs are equal. But after I keep simplifying that equality, I end up with this I have no idea what to...

Ah I see. I'll try that now.

How exactly are Vdd and Vx in series? I mean they can form 1 loop but how are they in series if there's a transistor drain connected to Vx? I'm just quite confused. Usually KVL get's me out of situations like these.

Homework Statement Homework Equations The Attempt at a Solution My first attempt was to figure out what region the PMOS is operating in so that I could decide what equation to use - so I tried to find Vgs. Vgs = Vg - Vs. Vs is of course just Vdd but for Vg I did a KVL loop as below...

Homework Statement Hi, I'm asked to find the transfer function for the following digital filter described by a difference equation Homework Equations The Attempt at a Solution [/B] Usually if there's no constant term (0.7) here, I can just rearrange in the form of Y(z)/X(z) to give me...

Homework Statement Hi, I have the following continuous sinusoid given by Now, if I sample this with a sampling rate of $$f_s = 4f_0$$ , I am told this is the answer, I don't understand that. How come the frequency of the sinusoid has changed? I already studied sampling, etc. but this...

Ah. I see. I'm planning on using the Crank-Nicholson method to solve the PDE. Do you have any suggestions on how I could actually convert that PDE(well the Q*diracDelta part) into a difference equation? I'm planning on using MATLAB.

Homework Statement Hi, So I have a perfectly insulated rectangular plate and I trying to use the 2D heat equation in conjunction with numerical finite diference methods and MATLAB to see how the temperature changes throughout the plate. My issue is with the heat source. I am supposed to decide...

So basically, I've managed to understand most of it I think now but I have one question. Clearly from this argument, The differential input voltage is zero and thus inverting and non-inverting voltages should be equal. Why do people then say that only in a closed loop configuration(with...

Okay, I've adjusted my question. Now, after some googling I found this from here https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-071j-introduction-to-electronics-signals-and-measurement-spring-2006/lecture-notes/22_op_amps1.pdf And that indicates to me that Vi = 0...

Homework Statement Hi, Here is what I know about the Ideal Op-Amp. - The open loop voltage gain is infinite - The output voltage is given by the following $$v_o = A(v_+ - v_-)$$ - Only with a negative feedback loop is $$ v_+ = v_-$$ My query is with regards to the negative feedback loop...

Homework Statement Hi, I'm having some doubts about the gradient. In my lecture notes the gradient of a scalar field at a point is defined to point in the direction of maximum rate of change and have a magnitude corresponding to the magnitude of that maximum rate of change of the scalar field...

I'm trying to derive the Biot Savart Law. Lorentz force is covered in a later chapter. I realize that what I have stated up there is not in fact Amperes Law but simply a component of the Lorentz Force.

Homework Statement Hi, So I'm having some trouble deriving the biot savart Law. We have been given a derivation in the notes and I understand everything up until the last step which is labelled in the picture? Equating the two, How did the B vector turn into dB? It seems like he...

That's perfect. Thank you so much!

Ah. I understand now. So in this case, the current source will adjust Vs since it can't change -Vss. And it will adjust Vs to probably some negative value so that Vgs = Vg - Vs = 0 - Vs becomes positive and is greater than the threshold voltage. The exact value of Vs it settles on is dependant...

I always thought that an ideal current source produces the specified current no matter what the voltage across it is.