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I'm trying to design a bidirectional current source for the purpose of measuring very small (0.0001 Ohm) resistances. I've come across this circuit: I can see that the transistors are there to 'boost' the current but I don't understand the purpose of the 1K resistors and the capacitor. I...

So after looking at both PNPs and P-Channel MOSFETs, I think I'll go with the MOSFET variation. But I've run into another problem here and am looking for advice. The cable that I'm measuring can be upto 500m long. This in itself isn't a problem but the cable picks up all sorts of noise. There...

Thanks uart and averagesupernova. I am going to try and build this circuit a bit before I commit to the design. One question about the MOSFET: you state I need one with low threshold voltage and that I completely understand. However, normally, a MOSFET's source is tied to ground and the gate...

Here we go... sorry I didn't supply a schematic earlier. Note, Q1 is now a generic PNP transistor. In the LTspice sim. This circuit works when there is a zero ohm test resistor but when there is an open circuit present at the test resistor the current flows through R1, through the emitter...

uart and averagesupernova, Thank you very much for that explanation. I simulated the circuit in LTSpice and you were right - the ckt doesn't work. I think I missed the fact that an NPN would cause the feedback to be positive instead of negative. One question, however, does this handle the case...

Got it: Replace Q1 with a darlington. Makes sense. Your second point, regarding changing the swapping the inputs of the op-amp confuses me. This is my first analogue circuit (I have designed and implemented digital circuits before). My question is, why would the circuit be better if I simply...

I've been design a simple ohm-meter which can measure resistances in the range 0.001 to 100 Ohms. I am aiming for an accuracy of 3%. Here's the circuit (so far): The circuit is basically a programmable current source which can source a current of 100, 10 or 1 mA. At junctions Va and Vb...

I'm looking for some advice regarding how to terminate SPI signals which are going to an external PCB. I know that SPI isn't meant for board to board communication but in this case the connecting ribbon cable is short - about 6" max length. My frequency isn't high, just 2 MHz but I have...

Thanks! Sorry about the late reply - I didn't notice anyone replied. The input voltage is just 7V. Actually, I can make it anything I want as it's in my hands, so I'm going with 7V. The 5V and 3.3V rail have the highest current requirement (0.5A and 1A respectively). My initial estimates...

I'm trying to design my first switching regulator circuit. I require three voltage rails, 5V, 3.3V and 1.8V. But to get started, I'm just focusing on 1.8V. I've decided to use the LT3507 as it seems to be commonly available here. It also has 3 buck regulator outputs, so it's a one-chip solution...

Thanks. I've already found some that I like. One question I had though - is it worth it to integrate the power circuitry on the PCB? What is the disadvantage of keeping the power supply external? If I keep the PSU external, I don't need ventilation for the main circuitry and it can be...

Any regulator that you could recommend? I would prefer a easy to use one as this would be the first time I implement switchers!

I'm close to finishing my first 4-layer board. Initially, we felt that keeping the power supply as a separate unit would be better. This was because we wanted to avoid having heat on the main PCB - mostly because the area where the device is intended to be used is very hot and also quite dusty...

I had a small question about ESD. I have implemented TVS diodes on my project at the input side. However, the output is still unprotected. It's a bit like this: CPLD 1 -> Logic-Level MOSFET -> WIRE UNDER TEST -> TVS DIODE -> Pull up -> CPLD 2. So the input side is protected from ESD...

I have the following circuit wired up on a protoboard. The datasheet for the BSS138 MOSFET is here. I'm puzzled regarding what I'm seeing happen with this circuit - when I apply 3.3V at the gate resistor, the MOSFET turns on fully and I see 3mV at the output. This, of course, is expected...

Here's the picture I promised, but it seems yungman already provided a solution :): As berkeman said, I don't have a high frequency requirement. So I feel 0.1uF would be OK. Regarding 47uF, I'm using an Altera CPLD and they recommend 0.01 to 0.1uF decoupling and 47uF to 100uF for bulk...

Thanks for all the advice, guys! I'll stick with this layout but may have to deviate from it slightly. I'll describe the issue below. Yungman, the cap are on the same side as the chip. I was tempted to put it below, but felt the decoupling is most important. I also have 47uF caps about 2-3...

I'm designing a 4-layer board with a couple of CPLDs and a uC. The top and bottom layer are for signals and the 2nd layer is ground and the 3rd layer is 3.3V. I'm placing a 0.1uF X7R Ceramic cap in 0402 package on every Vcc/Gnd pair. The thing that confuses me is that I've seen several ways...

Thank you very much, yungman!

After some reading, it seems I need determine the peak pulse current. But how do I estimate the voltage that will develop due to ESD? I believe I need to divide that by the impedence of the circuit. Would appreciate any pointers regarding this.

OK, the cable connects to a MOSFET's drain and the other connects to a CPLD's pins. The output high voltage is just 3.3V. To illustrate: CPLD A's Output -> MOSFET -> Connector -> Wire Under Test -> Connector -> CPLD B's Input I think there should be ESD protection between CPLD B and the wire...

I'm developing a basic cable continuity tester. Essentially, the circuit drives a test vector onto the cable and reads back the output vector. The output has MOSFETs for buffers/drivers but the input is connected directly to the ICs (CPLD, in my case). My concern is ESD. Unfortunately, I have...

Yes, the current board that I'm designing is actually meant for a long-term test. The aim is to place four of these on the floor and use them alongside the old machines. Regarding, voltages. The CPLDs (Altera Max V) can only work at 5V but through a transistor I can of course switch 5V. But the...

Another thought that occurred to me. What if I forget TVS diodes and pull ups and instead put another MOSFET on the input. And increase the testing voltage to 12, possibly even 24V. Would this help against interference? A bit like this: [Sorry about the badly drawn schematic. I had this on...

Thank you berkeman. I hope RF interference doesn't become a problem for me. I have too many components on the board as it is! But I wanted to ask, what made you thought that RF won't be a problem for me? The wires themselves will make good antennas considering their length. Was it the lack of...

Thank you, indeed the pull-ups are located at the input. In general, when does RF interference become an issue? Does it depend on the frequencies we're operating? I'm sure the length affects the things. I should add, we don't need to any certification for RF emission etc. because the units will...

Nope, just wire-crimpers but they're on the floor below and I don't think they cause much of a fuss. Wires at switched at 3.3V but we can take this upto 5V if needed. As an aside, in general, would a stronger pull up help us in this case? I mean, if I put in a 1K pull up than does this mean...

Thanks berkeman. Will check that out as well. I think TVS diodes also come in arrays, so that's promising as well. One more thing I'd like to ask - I asked this very question on another forum and was told I should add RF filtering as well. Would this be necessary? Incase the operational...

Sorry to bump this thread again, but I had another question - should I be concerned about ESD damage? The wires can be quite long, about 10 meters. The output, as mentioned, has MOSFETs as buffers. However, the input side is completely naked with the exception of pull ups. Should I put in a ESD...

Not a problem. :) I appreciate the responses! Thanks. I had a hunch it would be that, but I wanted a more experienced engineer's opinion on the matter before I went ahead and designed the thing.

About to design the receiving end of the board - any advice, berkeman regarding termination? Would appreciate any thoughts on it.

Hello, I'm considering using a logic-level MOSFET as a switch in a design. The drain of the MOSFET will be connected to an IC. The IC works at 3.3V and the maximum voltage at which it's guaranteed to read a low is just 0.8V. Now, I think every MOSFET will able to satisfy this but I'm just...

yungman, I actually tried a darlington array before. The issue was that the collector-emitter voltage was 0.6V. This is not low-enough - the collector of the darlington is connected to a Max V CPLD. The max. voltage at which the CPLD is guaranteed to read a low is 0.8V. I felt that 0.6V was...

Thanks yungman, your point about simplfying the calculation made sense and I'll follow that. However, because now the input resistance is essentially 1.3K and my input voltage is 3.3V (I cannot increase this), my base current is just 2.5mA. Since beta = 20, then my required current is 3.1mA...

I've been looking some pre-biased dual NPNs to use as buffers. My criteria is to have a very small package (i would prefer their width be less than 3mm. 2mm is very good) and that they ought to have a max. collector current rating of 200mA. I may have found such an NPN in the...

Okay, each wire will have a 4.7K pull up - the MOSFETs are used in Open Drain config. This pull up is located on the receiver side of the board. So, it's a bit like this: Output -> Buffer/MOSFET -> Harness -> Pull-up Resistor -> (termination?) -> Input Now here's the thing, for a single wire...

Imagine there are two CPLDs, one is programmed as a Serial In Parallel Out shift register (this is the driving end) and another is a Parallel In Serial Out shift register. At the output of the driving end, I'll have MOSFETs acting as buffers. This has the advantage that I won't be sourcing...

Thank you yungman and berkeman. Regarding current surges due to MOSFETs, I was actually planning on having a 1K resistance between the gate and the output pin of the CPLD. This could potentially limit the current when the gate capacitance is uncharged. I've seen this done before - what do you...

I'm designing a circuit that consists of the following: AT Mega 128L 2 to 6 CPLDs SD Card Interface 100 to 200 MOSFETs Power circuitry I should add that I already have a 2-layer prototype of the board and it works well. However, the prototype does not have the MOSFETs and the SD...

Yes. Learning the language doesn't seem to be a difficult task. I have experience in programming C and Objective-C. What I'm really confused about is the development kits.

I want to get started with programming CPLDs. However, I'm confused about which development kit to get? I have about $200 to spend. I feel that Altera has slightly better software - their Web version is free, it seems. So I'm mostly interested in that but have my options open. I'm also...

This is the load line that I plotted. I measured the drain current (vertical axis) and the Drain to Source voltage (horizontal axis). I varied the Gate-Source voltage via potentiometer. Now, I'm not going to confuse myself with saturation or linear/triode. I'm going to ask: in order for the...

Ah, so one moves from right to left in the graph! Am I correct in my understanding that, when used as a switch, the MOSFET should then reach the "linear" region as soon as possible? This use of the word saturation is very confusing for me!

I'm trying to learn about MOSFETs in order to use them as a switch. (note: this is not a homework/school question). On my breadboard, I have the following circuit hooked up: I vary the gate voltage using a potentiometer. Here is what confuses me: according to wikipedia, the MOSFET is in...

I am using 4 MOSFETs in an H-bridge. The H-bridge is controlled with two MOSFET drivers (specially IR2113). I aim to drive the H-bridge via PWM which is carrying a 50Hz sine wave. Note that, the load is not a motor. Instead, the H-bridge is being used as a inverter. My question is, does the...

Homework Statement Find the DC Gain and the Frequency Response of the above discrete-time system. The Attempt at a Solution This isn't really a homework problem but something I've been struggling with for my exams. I am given a transfer function in terms of z and am asked to find its...

Homework Statement I just gave an exam where one of the questions was where I had to find the various parameters using the two forms of tests for an Induction motor: No load test Locked rotor. Now, I can do this question but there is one thing that is confusing me. I had to find the stator...

I'm trying to figure out the currubt gain for a class ab push pull amp. I know that it's basically two emitter followers, so am I correct in assuming that the current gain is just Beta?

Hello all, I was wondering what the difference between a power amplifier and a preamplifier was. Someone told me that a power-amp provides current and voltage gain whereas a pre-amplifier only provides voltage gain. If this is the case, why are circuits like the following considered Class...

Yes, I know what you mean. I'm actually very passionate about Physics/Astronomy so I often study that during my spare time. I'm also an avid Astrophotographer... I just don't see how any of this would matter to an employer. Infact, some tell me that its a waste of time. Well, I do have 1.5...