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Main Question or Discussion Point
What does the FETCH EXECUTE OVERLAP instruction mean ?
that does almost seem to be a something you would expect with pipelining or else you would have some gap of clock cycles between the stages each time the cpu fetches a new instruction.It just looks like the execute of the current instruction is overlapped a bit with the fetching of the next instruction:
http://www.geocities.com/siliconvalley/peaks/3938/z80arki.htm