What does the FETCH EXECUTE OVERLAP instruction mean ?
It just looks like the execute of the current instruction is overlapped a bit with the fetching of the next instruction:
that does almost seem to be a something you would expect with pipelining or else you would have some gap of clock cycles between the stages each time the cpu fetches a new instruction.
how common is the fetch-execute overlapping in modern cpus? it seems common sense to have the next instruction fetched by the time the preceding one is executed unless the code jumps memory locations . .
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