Advice for a choke for blocking parasitic switching spikes

[artis]

Now I had a few months away for other things that I'm still doing but I started learning LT spice recently so here is my own version of the filter @Baluncore posted here, so may I ask what the author himself thinks of it?
I played around with the values and did an AC analysis of 1volt amplitude from 1Khz to 70Khz.

 

[Baluncore]

First the praise; well done getting into LTspice.

Now the constructive criticism.

You increased C3 from 1uF to 550uF. The advantage of the 1uF cap was that it could be ceramic with much lower inductance and ESR than an electrolytic. C3 was needed to attenuate ultrasonic spikes with HF harmonics. Only the 50 kHz fundamental remained a problem for the L3 & C4 trap.

You defeated the series L3&C4 trap that was tuned in the circuit to the 50 kHz fundamental. If L3&C4 are not tuned correctly you may as well leave those components out of the circuit.

Making components in circuits bigger because they appear to work better is bad practice. Components only have to work well enough to meet the circuit specs. Beyond that, they cost space and money.

Spice can lead you to think all components are perfect. For example electrolytics are also resistive, you must think in parallel about component value, availability and cost.

 

[artis]

thanks for answering, yes I'm getting into spice slowly at first it seemed a strange program the user interface is meant for learners more than those who seek ready plug n play solutions I guess.

Well I do agree with your criticism and about the component choices, this was not meant as the final version of what I would do but more of a playing around way of learning spice.

So here are a few questions, leaving out the cost and space of bigger/overdesigned parts, why is the larger capacitance in C3 worse than the smaller capacitance apart from that ceramics would have lower ESR? I assume that the goal is to get the noise line as low as possible and for a wider frequency range? Also I don't know for sure whether the switching frequency is perfectly 50khz , depending on load etc it can vary a little I think.
Well just physics wise would i be still better off using that low capacitance ceramic in c3 or can I put multiple smaller electrolytics in parallel? The thing is in SPICE simulation it seems the larger capacitance is better , well maybe I should write in the ESR on cap that I'm using and see what changes, since spice allows such fine tuning.L3 and C4 should be left as is in your original schematic ?

 

[Baluncore]

why is the larger capacitance in C3 worse than the smaller capacitance apart from that ceramics would have lower ESR?

Because the fundamental is at 50 kHz with harmonics above that. It is unnecessary to use more capacitance since there is no noise below 50 kHz. Electrolytics are not much use above the audio range.

Well just physics wise would i be still better off using that low capacitance ceramic in c3 or can I put multiple smaller electrolytics in parallel?

Why waste time and money installing components that will not perform?
Simulate it with LTspice, with realistic ESR specified for the capacitors.

 

[artis]

Ok, I understand your points, let me take a few days to get used to spice more, i will try to find some relevant ESR data for the various caps I have and see what changes what.

 

[Baluncore]

Avoid generating noise you will have to attenuate later.
Where does the noise you are trying to attenuate come from?
Go back to the start and calculate the values again.

The current at full power is 1 kW / 170V = 5.9 A.
At 50 kHz the reservoir caps are charged every 20usec.
Allow maximum reservoir ripple at full power to be 100 mV.
C = i * dt / dv = 5.9 * 20u / 0.1 = 1180 uF.

Power supply wiring that passes reservoir caps has current flow towards load.
But reservoir ESR drops opposite voltages during the charge and discharge cycles.

Assume that the recharge pulse lasts 20% of the cycle 20 usec = 4 usec.
During charge, current i, flows to the load, while 4 * i flows to the reservoir capacitor.
That drops a positive voltage across the ESR, Rs. V = +Rs * i * 4.

During discharge, current i flows from reservoir to load.
That drops a negative voltage across Rs; V = –Rs * i.

Peak-peak ripple voltage due to ESR is therefore V = Rs * i * 5;
Which will be 100 mV when ESR = Rs = dV / ( i * 5) = 0.1 / ( 5.9 * 5 ) = 3.4 milliohm.
When added to the reservoir ripple voltage that gives 0.2 V at ESR = 3m4R.

The problem starts with capacitors in series, they have half the capacitance and double the ESR of a single capacitor.

Electrolytic caps dry out which reduces capacitance when running hot due to ESR * ripple current squared. Poly and ceramic have a longer lifetime. Electrolytic capacitor construction also has higher inductance that allows the start of the charge cycle to produce a significant voltage spike. Parallel ceramic and poly pulse reservoir capacitors can reduce it to a bandwidth that can be handled with the electrolytic cap series inductance.

Look at the ESR and series inductance of different types of cap construction.
Use spice to generate a 4 usec pulse at 50 kHz, so you can study the best combination for your charge reservoir. Start with Vsource as a PULSE(0 170 1u 1u 1u 3u 20u). Then steepen the edges.

 

[artis]

as for my smps secondary filter/reservoir caps see the attache image, there are 12 caps in total each cap is 160v/1000uF.

as for the spice filter, I have some wima mks4 0.1/630 on hand but I tried googling etc and can't find ESR data , even in the original datasheet.

 

[Baluncore]

see the attache image

Where?

 

[artis]

ups sorry forgot to attach.

 

[Baluncore]

Firstly, avoid having the reservoir caps on a separate wiring spur. Run DC power and ground rails from rectifier to load, via the reservoir terminals.

Electrolytic capacitor series inductance tends to be proportional to capacitance. Lower the capacitance value until reservoir-ripple ramp-amplitude at full power is reduced to 100 mV, no further. The capacitor self-inductance spike, and ESR voltage step will appear added to that ramp. Too much capacitance will increase both the dominant inductive spike and ESR step.

 

[artis]

My psu layout is already such that the caps are soldered in the rails which are thick and run from traffo secondary to output where wires are soldered that go to amplifier boards.

So if I got right , what you are saying is that too much capacitance on the secondary side instead of filtering out the spikes and ripples to smooth DC tend to add itself a parasitic spike which is the result of the capacitor inductance working together with the switching spikes from the transformer output which is the capacitor input?PS. can you or anyone for that matter give me any reference for the ESR value of typical 1n to 100n polyester capacitor? I feel weird as I am searching parts suppliers and various brands but seemingly none offer this value ?

 

[Baluncore]

So if I got right , what you are saying is that too much capacitance on the secondary side instead of filtering out the spikes and ripples to smooth DC tend to add itself a parasitic spike which is the result of the capacitor inductance working together with the switching spikes from the transformer output which is the capacitor input?

If you have more reservoir capacitance than needed, then you also have more inductance than necessary. The terminal and foil inductance of electrolytic caps can be a big problem with switching supplies as it produces a voltage spike at the start of conduction. I am saying use two small caps in parallel rather than one larger one.

I feel weird as I am searching parts suppliers and various brands but seemingly none offer this value ?

Search for "pulse capacitor".
Pulse caps are used as snubbers in power switching applications, but they can also be used in parallel with electrolytics to reduce the initial inductive spike. You will not usually find ESR quoted for pulse caps, only for electrolytics.

[edit]
Here is a data sheet.
https://au.mouser.com/datasheet/2/88/PPB_series-553044.pdf
Notice that dV/usec is specified for different capacitor values.
From that you can calculate pulse current from; C = Q / V; i = C * V / t;

 

[artis]

after searching in my parts catalog it seems that these polypropylene film capacitor for ac pulse are rather expensive, the values I would need for the filter which are 1uF and 3 or 3.3 uF run about 10 usd a piece.

So I am also considering the chokes, now would you advise me a little on what current ratings I should look for in the chokes, in the series LC filter part of the 3 or 3.3uH choke (depending on which one I will be able to get in my store) I assume I would do fine with mA of rated capacity but for the main chokes on the DC rails I would assume I need to calculate my maximum operating current of the amplifier at full load and then choose accordingly correct? Otherwise the filter will choke the amp at or near full power operation?

 

[Baluncore]

The power rail chokes will saturate if not rated for peak DC supply current. Any notch filter choke must be rated for ripple current. You can measure that by plotting current in the time domain simulation with LTspice. Do you really need a trap? Does optimising electrolytic selection not simply resolve the problem?

You should design and build chokes optimised sufficiently for the power of the supply. That is where understanding and experimentation comes in. Streaming words will not resolve your fears. Your fear may be real, or procrastination, but if you don't experiment you will never find a pragmatic solution that actually works.

For a production design, optimisation for minimum construction cost is important. For a one-off, cost is not so important and you can trade cost for design time.

... it seems that these polypropylene film capacitor for ac pulse are rather expensive, ...

Pulse capacitors cost money because they work. If you design and select reservoir components for minimum inductance you will probably not need pulse caps. You might also design your amplifier to better reject power supply noise. If the inductive spike is too big, because you can hear it, then do something about it. Buying a more expensive pulse cap is the penalty for lack of flexibility and experimentation in reservoir design and layout. Sticking with the cheap electrolytics you first obtained may result in the most expensive solution.

 

[artis]

I agree with you , although I must say my smps secondary side reservoir caps were not exactly cheap, I bought some rather expensive low ESR nippon-chemicon or nichinon forgot which ones.
I have done some experimentation in the past with the samps to find out the problems, I have also probed my secondary side and I am afraid that the capacitors are not the whole blame here, there is some small ringing present in the primary side of the switches so I think it all comes together to form this spike behavior in the secondary.
This was my first large power smps so for me it would be much cheaper to simply build a small choke filter for it than to redesign all of the smps. I also have some other projects going on where I'm involved so time is also a constraint.

On the flip side I have never made a filter so why not , I see this as an opportunity to learn more and see in real time how a spice model performs in a known real life situation where I know the problem.
I am also thankful to you @Baluncore for giving me advice here.

Ok , so just as I thought the DC rail chokes should be rated for my full work current and with some reserve , how about the smaller series LC choke, given it's a series LC the current through it will only be as large as the AC parasitic waveform riding on top of the DC rails so I assume a small current, but I guess I should go to spice to see what the value could be.

 

[Baluncore]

I have done some experimentation in the past with the samps to find out the problems, I have also probed my secondary side and I am afraid that the capacitors are not the whole blame here, there is some small ringing present in the primary side of the switches so I think it all comes together to form this spike behavior in the secondary.

That is unlikely. The ringing you observe on the primary side will be a voltage waveform. The communication across the pulse transformer is primary current to the magnetic field, then to secondary current. The spike you are getting on the secondary is a voltage spike, almost certainly related to di/dt in the secondary wiring and capacitor inductance.

 

[artis]

Ok I understand your point , that even though the primary current in the transformer primary winding has some minor "tails" the secondary creates it's own spikes as the combined result of many factors such as not the best pcb trace layout, capacior self inductance etc right ? Would this be so because any minor but very sharp spike (almost vertical rise and fall ) wouldn't "get through" the transformer or atleast be attenuated enough so that the secondary filter caps can deal with it?Also , should the main chokes in the filter DC rails be rated for 10mH? because doing spice simulations changing them to lower inductance values like 5 or 3mH results in only a few dB less in the drop of the signal.
But that lesser inductance means a smaller inductor with less wire and less space.

 

[Baluncore]

But that lesser inductance means a smaller inductor with less wire and less space.

Engineering involves lowering the cost while still meeting all the specifications. You are looking for lower cost, but you have no specifications on amplifier immunity to supply noise, so you cannot yet know how quiet your supplies need to be. By all means lower the inductance of the chokes.

Switching amplifiers are significantly immune to power supply noise, indeed they should create as much noise on the supply as there was in the first place. Get the priorities right. It is usually easier to refine specifications than to over-engineer the hardware.

 

[Baluncore]

In post #44 you show a bipolar supply with a common ground.

The supply and amplifiers do not need a power supply ground if you use bridged pairs of amplifiers. That eliminates the reservoir series capacitors and all the ground connections, which reduces ESR steps and inductance spikes. All ground conductor material can be usefully reassigned to the power rails.

 

[Tom.G]

The supply and amplifiers do not need a power supply ground if you use bridged pairs of amplifiers.

Also known as an H-Bridge output stage. Here is the basic idea. Of course you have to get the biasing right. The added L and C are needed only if you are running a class D amplifier.
https://www.analog.com/-/media/imag...s-d-audio-amplifiers/class_d-fig-03.jpg?la=en
Cheers,
Tom

 

[artis]

Well my amps are just a stereo (2 channel ) version of an AB topology, rather powerful ones (16 output devices per channel) My psu is actually almost like you @Baluncore showed with a single thick ground wire going from the psu for both amp boards as well as for the speaker connectors, just with the addition that in the very psu secondary side itself the filter caps are connected such that each cap either from positive side or negayive one goes to ground in each of the two bridges, that is because my supply voltage is 85-0-85 or about 170vDC and my filter caps are rated 160v so I connected them like that, in order to rewire I would have to swap out my existing caps for ones that are rated for double the voltage , well at least 200+ VDC, then I could rewire like in your schematic.

The question then becomes , which is cheaper and would result in more noise reduction, the capacitor swap or simply adding the filters. Something tells me that simply rewiring the cap bank with new capacitors wouldn't fully get rid of the noise and a filter would still be needed the only benefit probably with smaller DC rail inductors.

 

[artis]

I doubled checked the schematic @Baluncore you last posted and yes seems the only difference in there is that instead of the caps in each of the two bridge rectifiers being added directly between the pos ad neg rails in my psu the caps are tied to the ground so between pos ad neg rails they are two in series with ground in the middle.

 

[Baluncore]

I doubled checked the schematic @Baluncore you last posted and yes seems the only difference in there is that instead of the caps in each of the two bridge rectifiers being added directly between the pos ad neg rails in my psu the caps are tied to the ground so between pos ad neg rails they are two in series with ground in the middle.

That is the fundamental point I was making. Series connection to the irrelevant ground gives half the capacitance, twice the ESR, and twice the inductance.

 

[artis]

Sadly I wasn't aware of this when I first ordered the caps and finished the smps, normally at least in linear psu it is considered an advantage that the bipolar rails allow the use capacitors with lower voltage ratings that have double the capacitance rating for the same price.

Well I guess it's parts search once again, have to check out how much would a 200v rated or more cap would cost. I wonder if my DC voltage is about 170/175, what would be the minimum safe margin of capacitor voltage to choose from. I guess 250v.