# Analysis of Boost converter

core7916
Hello,
I am designing a simple boost circuit, in which I have convert output of 200v.
i am testing the idifferent input voltages , 12, 15 and 24v supply.

But in each time there is no change in voltage in duty cycle- 20% -40%.
like example. i am giving input as 12v.
outputs are.
duty cycle - output oltage
10% -30v
20% - 72v
30% - 80v
40% - 88v
45% -160v

my concern is why there is no change in voltages in 20% 30% duty cycle.
* i am giving pulses to mosfet which i am generating from ir2110 gate drivers.
* above is the example whiuch i tried with 12v . And the same kind of output (but higher voltages) i am getting when i tried with 15 and 24v.
* i am observing that after no change in duty cycle the voltage is increasing suddenly to a higher voltages.
(in above 88v to 160v).

1) is this the way boost converter works?
2) if not what is the reason for this irregular output ?
3) how to avoid it.?

i am designing the circuit with reference of online designs.

1) is this the way boost converter works?
2) if not what is the reason for this irregular output ?
It depends on the topology.
Does the boost converter operate at a fixed frequency?

Have you simulated the converter?

core7916
switching frequency is 300khz..
i am attaching boost circuit schematic.
yes sir simulated in multisim.

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Are you measuring a real system, or is this all simulation?

While the switch MOSFET is closed, current increases in the inductor.
When the switch opens, the inductor delivers that current to the output.
When converting from 12 V to 200 V you can expect a duty cycle with 95% switch on, with 5% boost during off. If that is not the case, I would look at the inductance value, series resistance and saturation.
1. Plotting duty cycle against output voltage assumes a fixed load current. But the current is voltage dependent. Open loop operation is not used for flyback boost converters, so why do you model it ?
2. For big voltage ratios, a transformer would be used in place of the inductor. That can reduce peak currents on the supply and load.
3. If the output load goes open circuit, the output capacitors will be damaged by overvoltage.
4. You need a controller with some feedback of output voltage to the regulator. That controller should limit the inductor current when there is a short circuit.
What type of controller are you contemplating ?

core7916
Are you measuring a real system, or is this all simulation?

While the switch MOSFET is closed, current increases in the inductor.
When the switch opens, the inductor delivers that current to the output.
When converting from 12 V to 200 V you can expect a duty cycle with 95% switch on, with 5% boost during off. If that is not the case, I would look at the inductance value, series resistance and saturation.
1. Plotting duty cycle against output voltage assumes a fixed load current. But the current is voltage dependent. Open loop operation is not used for flyback boost converters, so why do you model it ?
2. For big voltage ratios, a transformer would be used in place of the inductor. That can reduce peak currents on the supply and load.
3. If the output load goes open circuit, the output capacitors will be damaged by overvoltage.
4. You need a controller with some feedback of output voltage to the regulator. That controller should limit the inductor current when there is a short circuit.
What type of controller are you contemplating ?

Sir i am testing real time system.
As you said for converting 12 v to 200v i need duty cycle should be high.
So insted of giving 12v i am giving 24v. Then also at 20-40% there is no change in voltage. After that sudden increase is happening.

The capacitor what i am using has rating of 400v. I used all components which are high rated for testing.

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Follow the sequence of one cycle. Inductor current starts out at zero.
Close the MOSFET switch.
V = L·di/dt ; is the key to understanding inductor current.
di/dt = V/L ; which shows that the rate current rises, is proportional to the input voltage.

At some duty-cycle determined point, the switch turns off.
The inductor current is then I, and the stored magnetic energy, E = ½·L·I² .
The inductor current then flows through the diode to the output reservoir capacitor. It takes less time for the current to fall to zero because the output voltage is much higher than the input voltage. That is di/dt = V/L , again.

But how do you know the current has time to fall to zero, before you turn the switch on again with the fixed frequency and duty-cycle? And, what if it didn't fall to zero, it would start out higher, and get higher again each cycle, until the inductor saturated.

Operation as an open loop is not sensible, you need to close the voltage feedback loop. Something must prevent over-voltage destroying the output capacitors. Something must keep the inductor from saturating. That is a job for a voltage regulator, controller.

DaveE and berkeman
Gold Member
Your boost converter has essentially no load at the output. As @Baluncore explained above, there will be nowhere for the energy in the inductor to go. The result will be extremely high voltages at the output. This is how older auto ignition systems make a sparks. I calculated for your circuit 1.1KV at 50% duty cycle and 12 V input. Of course you won't get that, something will fail first. To make 200V from 12V, I calculated a duty cycle of about 9%.

You really need to study the theory of boost converters a bit before you try to design one. In particular, you should learn about "Continuous Conduction Mode" (CCM) and "Discontinuous Conduction Mode" (DCM). If that isn't something you know about yet, then you aren't ready to work with these circuits, IMO. I highly recommend the textbook "Fundamentals of Power Electronics" by Robert W. Erickson, but I'm sure there's lots of good stuff on the web too.

Gold Member
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core7916

The reason for the clustering of output voltages for different duty-cycles is related to the mode of operation, influenced by the way current flows in the simulated inductor. If I place a diode, D1, in series with the inductor and supply, it performs without the clustering, and with different output voltages.
Percentage duty-cycle for traces are labelled in the same colour.

With D1

Without D1

Tom.G
Gold Member
the way current flows in the simulated inductor
Is that from the reverse recovery of D2? The simplest models say no current can flow that way. It seems it should be a pretty benign (soft) turn off for D2 in DCM mode.

Or maybe something about increased switching losses with the drain capacitance. Maybe quasi-resonant style? That kind of makes my brain hurt to figure out.

Is that from the reverse recovery of D2? The simplest models say no current can flow that way. It seems it should be a pretty benign (soft) turn off for D2 in DCM mode.

Or maybe something about increased switching losses with the drain capacitance. Maybe quasi-resonant style? That kind of makes my brain hurt to figure out.
I do not yet know what mode it is, but I have managed to duplicate a clustered output simulation similar to the OP, with what I think is the simplest parameterised circuit in LTspice.

It does appear to be a bizarre π resonance involving the supply, inductor and the switch, but due to my other priorities, it will have to wait for the weekend before I will know if it is "too ideal" a model, or some real possibility. That is, unless someone else solves it first.

DaveE
Gold Member
It does appear to be a bizarre π resonance involving the supply, inductor and the switch
Yes, that's guess too, unless you have a REALLY slow (or schottky) diode for D2. But I don't think it's bizarre. It is normal in SMPS when conduction stops for nodes to show LC style (parasitic) oscillations. But I don't understand how that consumes more energy than the non-oscillatory case of the drain voltage being left high and then dissipated resistively during the FET turn on. As I said it makes my brain hurt... or, maybe I'm just lazy.

Baluncore
core7916
Hello.
While testing real time system i am getting profile like below.
I have given output voltage vs duty cycle graph.
In the test.
I am suppling 12v as input.
I am bit confused about waveform. Is this the corrct wave which i should get.

While testing real time system i am getting profile like below.
I see nothing below.

core7916
I see nothing below.
Sorry sir. I didnt attach file.
Below is the graph. I tested the circuit with different conditions. That is the reason for 2 curves.

Gold Member
I tested the circuit with different conditions.
Very good. I would guess those two conditions were with a Banana-Cream pie and a Hand-Grenade.

Am I close?

core7916
Very good. I would guess those two conditions were with a Banana-Cream pie and a Hand-Grenade.

Am I close?
I am designing to actuate a piezo actuator.
Dont go with two curves. Take any one of the curve.
If you know why i am getting that profiel. Please tell us.

Very good. I would guess those two conditions were with a Banana-Cream pie and a Hand-Grenade.
Am I close?
Congratulations, we have a winner, give that man a coconut.

I am designing to actuate a piezo actuator.
While testing real time system i am getting profile like below.
I have given output voltage vs duty cycle graph.
In the test.
I am suppling 12v as input.
I am bit confused about waveform. Is this the corrct wave which i should get.
By waveform, or wave, I assume you mean the shape of the line on the graph. I can understand that a real circuit may have that parametric relationship. But I am not happy that you are testing a useful circuit. Is the circuit built according to your diagram in post #3 ?

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Tom.G
Gold Member
If you know why i am getting that profiel. Please tell us.
What you are measuring (graphing) is the transfer curve of the boost circuit from the Gate of Q1 to the output voltage; specifically, duty cycle versus output voltage. The reason the two curves are shifted is that with a load connected, the duty cycle has to be higher to supply current to the load.

As @Baluncore said:
4. You need a controller with some feedback of output voltage to the regulator. That controller should limit the inductor current when there is a short circuit.
What type of controller are you contemplating ?
To say it another way, you need additional circuitry that senses output voltage and then controls the switching of Q1. The 'feedback' circuit will automatically shift those two load/no-load curves as needed to maintain the output voltage you design for.

This circuitry could either:
1. Shut off the drive to Q1 when the output voltage gets too high,
2. or it could decrease the duty cycle at high output voltage.

Note also the diode (D1) that @Baluncore added and the changed L1 value:
With D1 he seemed to get pretty good linearity of duty cycle vs output voltage.

Hope this helps!

Cheers,
Tom

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core7916
Sir i already tried with the circuit , baluncore suggested. Still getting the curves that i have given previously.
I have simulated the circuit in multisim and i got the graph . Which i have attached. If we compare both simulated and real time graph, there is no simularities.
I dont know how thease differes since i am testing same circuit real time. (Components are different in simulation and real time).

I am new to thease i dont have much knowledge about feedback circuitry

Red line : 300khz switching frequency.
grey line : 100khz . ( simulated in multisim).

Below is the graph. I tested the circuit with different conditions. That is the reason for 2 curves.
Re: Post #17. How can you measure a stable output voltage, when you have no load, what stops the output voltage from continuing to rise ?

I dont know how thease differes since i am testing same circuit real time. (Components are different in simulation and real time).

Re: Post #22. The two curves need to be simulated and measured at the same switching frequency, and the load must be specified.

I cannot simulate your circuit in LTspice because;
1. I do not have models for the same devices as you.
2. It takes too long to settle the output voltage.
3. When I reduce the reservoir capacitance to settle the output voltage faster, it enters a self-resonant converter mode between the inductance and the MOSFET capacitance.

core7916
Re: Post #17. How can you measure a stable output voltage, when you have no load, what stops the output voltage from continuing to rise ?

Re: Post #22. The two curves need to be simulated and measured at the same switching frequency, and the load must be specified.

I cannot simulate your circuit in LTspice because;
1. I do not have models for the same devices as you.
2. It takes too long to settle the output voltage.
3. When I reduce the reservoir capacitance to settle the output voltage faster, it enters a self-resonant converter mode between the inductance and the MOSFET capacitance.

sir, my concern is the simulated graph and what i got is not the same. what is the reason for this.
and as you said the 2 corves in real time is measured at the same switching frequency. i didn't connect any load, as of now i am just measuring output voltage.

i am able to measure the output voltage when i am changing the duty cycle. since voltage stops to increasing at some point of time.