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Apparent violation of KVL

  1. May 6, 2009 #1
    1. The problem statement, all variables and given/known data
    Not really a problem, but we're learning about source-free RL circuits and the instructor was deriving the current w.r.t time. I've actually seen this derived a few times but one thing has always bothered me.

    Looking at this picture recreated from the text

    http://homebrew.net.nz/RL.png [Broken]

    The equation dervied from it says:

    Ri + vL = 0

    which implies vR + vL = 0

    but I've always thought that with KVL you simply write down the first sign you hit when tranversing the circuit, i.e., why is the equation not

    -vR + vL = 0

    Surely since the two components are in parallel the voltage drop across them has to be equal??!

    Thanks if anyone can clear up my confusion
     
    Last edited by a moderator: May 4, 2017
  2. jcsd
  3. May 6, 2009 #2
    They are in series. We want to say that the currents through
    L and R are equal. We use this circulating current direction as
    our sign convention for vL and vR.
    vL +vR = 0
     
  4. May 6, 2009 #3

    Redbelly98

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    Since the direction of i is defined opposite to the actual current you'd get with a positive voltage across R, we have

    VR = - i R

    Equate this expression with VL and see what you get.

    p.s. FYI, in this case the two elements are both in parallel (same voltage) and in series (same current).
     
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