# Apparent violation of KVL

• caesius
In summary, the conversation is about a question regarding the derivation of the current with respect to time in source-free RL circuits. The person is confused about the sign convention used and why the equation is not written as -vR + vL = 0. The other person explains that the components are actually in series and uses the direction of the current as the sign convention for vL and vR. They also mention that both elements are in parallel and in series.

## Homework Statement

Not really a problem, but we're learning about source-free RL circuits and the instructor was deriving the current w.r.t time. I've actually seen this derived a few times but one thing has always bothered me.

Looking at this picture recreated from the text

http://homebrew.net.nz/RL.png [Broken]

The equation dervied from it says:

Ri + vL = 0

which implies vR + vL = 0

but I've always thought that with KVL you simply write down the first sign you hit when tranversing the circuit, i.e., why is the equation not

-vR + vL = 0

Surely since the two components are in parallel the voltage drop across them has to be equal??!

Thanks if anyone can clear up my confusion

Last edited by a moderator:
caesius said:
Surely since the two components are in parallel the voltage drop across them has to be equal??!

They are in series. We want to say that the currents through
L and R are equal. We use this circulating current direction as
our sign convention for vL and vR.
vL +vR = 0

Since the direction of i is defined opposite to the actual current you'd get with a positive voltage across R, we have

VR = - i R

Equate this expression with VL and see what you get.

p.s. FYI, in this case the two elements are both in parallel (same voltage) and in series (same current).