- #1
mathrocks
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I need some help with the PIC (PIC16F84) architecture. I am suppose to write timing diagram, including values of the PC (program counter), for the following instruction sequence when (a) the BTFSC (bit test register f, skip if set) instruction results in a skip and (b) when it does not.
Address Instruction
50 BTFSC
51 ADDLW
52 SUBLW
Does anyone know what this means? All I know is that I'm suppose to show when instructions are Fetched and Executed.
Address Instruction
50 BTFSC
51 ADDLW
52 SUBLW
Does anyone know what this means? All I know is that I'm suppose to show when instructions are Fetched and Executed.