Backgate Field Effect Transistor

[Excom]

Hi

At the moment I am trying to make a field effect transistor on a SOI wafer. The plan is to omit the top gate in order to get a backgate configuration.

Besides making the transistor I would also like to calculate the IV characteristic of such a devices structure. I am familiar with the calculation of the IV characteristic of a MOSFET structure when using the gradual channel approximation. However, I have tried to use the same procedure on the backgate structure, but I have some problems with the new semiconductor/air interface.

Is there anyone that has tried to calculate the IV characteristic of a backgate structure using the gradual channel approximation?

 

[eljose79]

Hello there,

Thank you for sharing your project with us. It sounds like an interesting and challenging endeavor. I have some experience with field effect transistors and their characteristics. In regards to your question about calculating the IV characteristic of a backgate structure using the gradual channel approximation, I have not personally worked with that specific approach. However, I do have some suggestions that may help you in your calculations.

Firstly, it may be helpful to review the basic principles and equations used in the gradual channel approximation for a MOSFET structure. This will help you understand the key parameters and variables that need to be considered in your backgate structure. Additionally, you may need to modify the equations to account for the new semiconductor/air interface in your device.

Secondly, I would recommend reaching out to other researchers or experts in the field who may have experience with backgate structures. They may be able to provide valuable insights and guidance on how to approach your calculations.

Lastly, I would suggest using computer simulations or modeling software to aid in your calculations. This can help you account for any complexities or variations in your device structure and provide more accurate results.

I hope these suggestions are helpful and wish you the best of luck in your project. Keep pushing the boundaries of science and innovation!

 

[charng]

Hello,

I can understand your interest in exploring the backgate field effect transistor (FET) configuration. This approach, where the top gate is omitted and the transistor is operated using the backgate, has been gaining attention in recent years due to its potential for improved device performance and reduced fabrication complexity.

In terms of calculating the IV characteristic of a backgate FET, there are a few key differences from the traditional MOSFET structure that need to be taken into account. The main challenge lies in accurately modeling the semiconductor/air interface, as you have mentioned. This interface can significantly affect the carrier mobility and therefore the overall device performance.

One approach to this problem is to use a two-dimensional simulation tool, such as TCAD, which can account for the interface effects and accurately predict the IV characteristic of a backgate FET. Another option is to use a more advanced modeling technique, such as the non-local transport model, which has been shown to accurately predict the behavior of backgate FETs.

I would also recommend reaching out to other researchers or industry experts who have experience with backgate FETs and their simulation. Collaboration and sharing of knowledge can often lead to new insights and solutions.

Overall, I applaud your interest in exploring new device configurations and your determination to accurately predict their behavior. I wish you all the best in your research and look forward to seeing the results of your calculations.