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Binary Digital Integration

  1. Feb 11, 2010 #1
    I need to design a digital circuit using TTL chips (adders, registers, etc.) to perform integration on binary values. The binary values are converted from analog signals such as a sine wave, constant, square pulse, and saw tooth. I can achieve the process for constants and positive signals using a circuit that performs summation. The problem I am running into is that I cannot use the summation process for a sine wave. The integration for sine, as you would know, is minus cosine, which ends up being a sine wave that is shifted by 90 degrees. In a sense, the input values versus the output values, after a single integration, are delayed by the time needed for 90 degrees. I am looking for suggestions for a circuit design to achieve this. I am aware that an analog circuit could perform these operations in a simple way, but that is not the task at hand. The digital circuit will reside between a pair of A to D and D to A converters. Thanks in advance for you input :)
     
  2. jcsd
  3. Feb 11, 2010 #2

    berkeman

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    Staff: Mentor

    Welcome to the PF. Sounds like a fun project.

    What are some ways to represent negative numbers in binary? Are any of them conducive to a simple adder/subtractor circuit design?
     
  4. Feb 11, 2010 #3

    berkeman

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    Staff: Mentor

    BTW, are your A/D and D/A circuits ground referenced, with negative voltage handling capability?
     
  5. Feb 11, 2010 #4
    How many digitizations are there per sine wave cycle? How many digitizations per second? How many digits do you need? For how many seconds do you integrate? With regard to integrating a negative number; Use up-down counters. If needed, you can preload a large number it the counter, or you can count down from full scale; either FFFFFF or 999999. [The SN 74193 has separate inputs for up count and down count.]

    Bob S
     
    Last edited: Feb 11, 2010
  6. Feb 12, 2010 #5
    I can use twos complement from the A/D to handle negative numbers. The A/D handles bipolar input with 8 bit excess 127 binary output. I will be converting that to two's complement.
     
  7. Feb 12, 2010 #6
    I only have to integrate 8 bits and my input to the D/A can be larger than 8 bits. I have freedom to input the signal at a slow frequency. The A/D requires about 20 to 30uS to process a slice of the signal, depending on my final choice. I have not decided on the slice interval I want to sample and control with the clocking rate. It can also suit my design needs. I am familiar with those counters and certainly could increment the slices in steps of 1, 0, and -1. I am not sure I follow how I would implement the counter to perfrom the integration process?
     
  8. Feb 12, 2010 #7
    One possible way to do the digital integration is to use a voltage-to-frequency converter (VFC), like the Analog Devices AD7742. This unit is a bipolar differential analog input synchronous VFC that runs on a 6 MHz clock, and puts out 2.75 MHz at +full scale, and ~0.3 MHz at -full scale (synchronized to input clock). The continuous output frequency pulse stream can be integrated in a TTL counter like the SN74193 (4 bit binary counter). Three chips can be cascaded for 12-bit full scale, four for 16 bit). The VFC output can be gated for turning on and off the integration. 16 bits at 1 MHz is about 65 milliseconds full scale. See

    http://www.analog.com/static/imported-files/data_sheets/AD7741_7742.pdf

    Bob S
     
  9. Feb 13, 2010 #8
    Thanks for the idea, but it looks like the VFC performs the integration for me. Unfortunately I need to perform the integration process using only discrete TTL chips from a binary stream from a voltage to voltage A/D. That is where I am stuck. In order to get minus cosine from the values representing sine, I need to delay them by 90 degrees. Is there some way to do that with a counter? Thanks, Mike
     
  10. Feb 13, 2010 #9

    uart

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    Nonsense, you don't need to do anything but add them up, the "-cos" will come naturally as a result of the integration, you don't need to do anything to force it - just keep adding.

    Optionally you could add the features to correctly scale the integral (by multiplying by the sampling interval) and also you can make it gradually "forget" very old data and hence avoid CD wind-up. But for a first attempt a simple adder (connected as an accumulator) will integrate correctly (at least for a while until it overflows due to integration of any dc offsets).

    Heres some equations that may be useful.

    x[k] = x[k-1] + u[k] : simple integrator.

    x[k] = x[k-1] + T_s u[k] : integrator with correct scaling.

    x[k] = (1-a) x[k-1] + u[k] : integrator will slowly forget old data for small "a". DC offset will decay at a rate of appox e^(-a t / T_s).

    Where,
    u[k] = the k'th input sample
    x[k] = integrator output after the k'th sample.
    T_s = sample period.
     
  11. Feb 13, 2010 #10
    I started why the same difference equation and process for digital integration. The process (accumulator) works great mathematically for inputs such as a constant, ramp signal, bipolar pulse signal. When I evaluated it using a sine input, the adding did not produce a -cosine. It produced an all positive result based on y[n] = x[n-1] + x[n]. I may be doing something wrong, maybe you can point that out?

    Here is a table of my observation using slices of T=π/4:

    SineTable.jpg

    For comparison, here are the same tables with a constant and a pulse, which do work correctly.

    ConstantTable.jpg
    PulseTable.jpg

    The input to the DAC would come off the register. For the constant and pulse, the output would be correct, but sine is not by just adding. Any idea how to solve the problem or what I may be doing incorrectly?
     
  12. Feb 13, 2010 #11
    To do digital integration of the sine to get thet cosine, you have to do two things:

    1) If you are starting from the sine of zero degrees, you have to preload the cosine (digital integration of sine) register with +1.00, the value of the cosine at zero degrees.

    2) To do the integration, you have to subtract from the cosine register the value sin(θ) dθ, the value of the sine times the value of the step size in radians. I did this in Excel for a step size of 18 degrees (θ = pi/18 radians). It worked fine (but a little coarse).

    Also, the VFC signal is not an integrated signal. It is a real-time digital equivalent of the instantaneous analog signal amplitude. The integration is done in the SN 74193 chips. Integration starts when the VFC signal starts counting (is gated into) in the 74193's, and stops when the VFC signal is gated off.

    Bob S
     
  13. Feb 13, 2010 #12
    Ok, I see what you are suggesting. The problem is that I would not be allowed to use the AD7742 chip to get to that point. If I could perform the same function using TTL chips, then I could implement that process. I may be allowed to provide a dual switch between integrating other signals and integrating a sine wave, I certainly can ask. I believe the best solution would be to use the same circuit, whatever it becomes, to perform both so that it would handle any input signal without knowing what it was. Thanks, Mike
     
  14. Feb 13, 2010 #13
    I'm puzzled as to why you are limited to TTL, D/A, A/D, etc. Is this some kind of homework assignment?

    KM
     
  15. Feb 13, 2010 #14

    uart

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    Nothing wrong it's not even an error, it's a natural part of integration called the constant of integration.

    The integral of sin(x) it NOT -cos(x), it is -cos(x) + const. Never forget about that constant, because it's a part of the solution just as much as the -cos(x) part. All you are seeing there with the "all positive" result is that integration constant (as a DC offset), nothing more nothing less.

    If you want to get rid of the offset then either start the sin(x) input at -pi/2 (-90) or use the more more complicated non-ideal integrator (see my previous post) that slowly forgets old data.
     
  16. Feb 13, 2010 #15
    Yes, this is a project for senior students. The analog students were given digital projects, and the digital students were given analog projects.
     
  17. Feb 15, 2010 #16
    I don't understand why you are limited to TTL, etc., unless this is a class exercise. If, however, you are free to use any approach, the most efficient might be to implement an equivalent to an analog computer approach, called a Differential Digital Analyzer. These are very cost efficient and don't have the noise and accuracy problems of the traditional analog computers, and they can be implemented with DSPs, microprocessors or microcontrollers along with hardware multipliers.

    KM
     
  18. Feb 15, 2010 #17
    Even better, you might look into the use of a (cheap?) Gate Array module.

    KM
     
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