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Homework Help: CIRCUIT ANALYSIS: 4 resistor, 2 Voltage Source, V.C.V.S., C.C.C.S. - Find Io & Vo

  1. Jan 23, 2007 #1
    1. The problem statement, all variables and given/known data

    Using nodal analysis, find [itex]v_0[/itex] and [itex]I_0[/itex] in the circuit below.

    http://img248.imageshack.us/img248/7325/chapter3problem301dy.jpg [Broken]

    2. Relevant equations

    KVL, KCL, V = i R, Super-node

    3. The attempt at a solution

    So I added 3 current variables, 3 node markers ([itex]V_1\,-\,V_3[/itex]), a super node, a ground node, and marked a KVL loop.

    http://img404.imageshack.us/img404/6940/chapter3problem30part26cn.jpg [Broken]

    [tex]V_0\,=\,V_3[/tex] <----- Right?

    Now I express the currents:





    KCL at [itex]V_1[/itex]:




    KCL at super-node:




    KVL inside super-node:


    Now I put those 3 equations into a matrix and rref to get [itex]V_1\,-\,V_3[/itex].

    [tex]\left[\begin{array}{cccc}0&-1&1&120\\7&-1&-8&400\\6&-6&-1&0\end{array}\right]\,\,\longrightarrow\,\,\left[\begin{array}{cccc}1&0&0&-1688\\0&1&0& -1464\\0&0&1&-1344\end{array}\right][/tex]


    But -1344 Volts seems too high (or low) doesn't it? Should I have also expressed the currents that I did not mark at the short wires between ground and [itex]V_1[/itex] and [itex]V_3[/itex]? Maybe I should use KVL 1 loop instead of the super-node KVL expression?
    Last edited by a moderator: May 2, 2017
  2. jcsd
  3. Jan 23, 2007 #2


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    your diagram as it stand contains two wires that short out V1 and V3 making them trivial with respect to ground chosen..should they not be there?
    Last edited: Jan 23, 2007
  4. Jan 23, 2007 #3
    Nope, they are there.
  5. Jan 23, 2007 #4


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    in that case your (effective) diagram changes dramatically, i m not even sure whether it is consistent?...anyway, if it is consistent: your circuit theory then tells you: I3=0, V_0=0, I2=0, V1=V3=0 so can join them up and form a loop containing the 120V source and 40 ohm resistor..and I_0=3A

    it is actually ok i think... consistency wise speaking
    Last edited: Jan 23, 2007
  6. Jan 23, 2007 #5
    So how would I go about getting a system of equations for [itex]V_1[/itex] thorugh [itex]V_3[/itex]?
  7. Jan 23, 2007 #6


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    you wanna find V_0 and I_0, why worry about v1, v2 and v3? they are introduced for node voltage analysis purposes only... but if you really want a "system" of equations: you have
    V1=0, V3=0, V2 = -120

    all w.r.t. the ground chosen
  8. Jan 23, 2007 #7
    OIC, [itex]V_1[/itex] and [itex]V_3[/itex] are 0 becasue they are both connected to ground through the wires you were asking about.

    So for [itex]I_0[/itex] we have


  9. Jan 23, 2007 #8


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    yes. NB: but for this question, introducing V1-V3 are not necessary, just observe that those wires short out several components leading to a simpler circuit and solve by inspection or doing a simple KVL loop (in this case).
  10. Jan 23, 2007 #9
    So, to get [itex]V_0[/itex], I do a KVL loop around the [itex]80\Omega[/itex] and [itex]40\Omega[/itex] and the 120 V source?


    So [itex]V_0[/itex] is really zero?
  11. Jan 23, 2007 #10


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    by the way, I got V0=0 by inspection. but what you have done is also correct. i guess showing that the circuit is consistent after all
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