CMOS driving TTL? fanout question

  • Thread starter EvLer
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In summary: ACT logic when driven by TTL logic.Notice that it's the Voh of TTL that is the issue, not the Vol of TTL. So you can drive CMOS logic with regular TTL gates. The output of a TTL gate gives a low enough Vol (0.4V) that the CMOS input will easily recognize it as low. But the 74AC output can't always be recognized as high by a CMOS input.Does that help?In summary, when mixing logic families, it is important to consider the input and output specifications to determine the fanout and potential need for level translation. CMOS logic typically has lower power consumption and requires less input current compared to TTL logic. When
  • #1
EvLer
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I just want to be sure about this:
i have a spec sheet for CMOS with CMOS and TTL loads. The question is whether CMOS could drive TTL, so the general formula is
fan-out = min(IOHmax/IIH, IOLmax/IIL)

where IOHmax is the max output current at high state;
IOLmax ... in low state;
IIH is input current at high state;
IIL is ... at low state;

so I think I need to figure out which parameters are of CMOS and which are of TTL. So here's what i think: output parameters have to be of CMOS and input parameters have to be of TTL.
Is it correct?

Thanks much.
 
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  • #2
Outside my field, but see if this helps - http://www.ee.calpoly.edu/~dbraun/courses/ee307/F99/01_10/01_Francois_Reak_Zeiss_Yeung.html

I couldn't find much on CMOS driven TTL. I might try to dig around my old texts, but it's been more than a coupld of decades since I looked at this stuff.
 
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  • #3
EvLer said:
I just want to be sure about this:
i have a spec sheet for CMOS with CMOS and TTL loads. The question is whether CMOS could drive TTL, so the general formula is
fan-out = min(IOHmax/IIH, IOLmax/IIL)

where IOHmax is the max output current at high state;
IOLmax ... in low state;
IIH is input current at high state;
IIL is ... at low state;

so I think I need to figure out which parameters are of CMOS and which are of TTL. So here's what i think: output parameters have to be of CMOS and input parameters have to be of TTL.
Is it correct?

Thanks much.
When you mix logic families, you look at their input and output specs to figure out how much fanout you can use, and also to see if you need to do any level translation between the two families. There are a number of TTL and CMOS families, so you need to be more specific when you do your checks.

In general, CMOS logic families are lower power than TTL, only require about 1uA of input current, and drive rail-to-rail at their outputs. Most CMOS logic has Vih and Vil about 1.5V in from the 5V rails, but there are several "T" variants (like 74HCT or 74VHCT) that have Vih and Vil set lower to accommodate the lower output voltages of TTL drivers. The weakest CMOS familiy is probably the CD4000 series, and in order of getting stronger and faster, you go something like 74HC, 74AC, 74AHC, etc. Look at the specs in their datasheets for Voh and Vol, which will usually be given for several Iol output current levels. To figure out the fanout of these gates driving some TTL series (74, 74LS, 74S, etc.), look at the input current required for the TTL gate inputs and the required Vih and Vil levels for those gate inputs, and then figure out how many of those gates can be driven by the particular CMOS driver output before too much current is being drawn from the CMOS driver output (so that the Vih and Vil specs would not be met for the TTL input).

Going the other way with TTL driving CMOS is more tricky. Look at how low the TTL output voltage specs are, and you'll see that meeting the 3.5V Vil requirement of CMOS gates is iffy at best. So that's when you use the "T" variant of CMOS logic, which has the lower input voltage specs. So if you have a 74AS gate that needs to drive a 74AC gate, you will use a 74ACT gate instead. Also, keep in mind that different PALs, CPLDs, FPGAs, etc., will have their own input and output characteristics, so be sure to check those on their datasheets before chosing what family of external logic to put around these bigger parts. It's a real bone-head move to drive a 74AC gate from a PAL that has TTL level outputs. Not that I've ever made that mistake, mind you... :uhh:
 
  • #4
berkeman said:
To figure out the fanout of these gates driving some TTL series (74, 74LS, 74S, etc.), look at the input current required for the TTL gate inputs and the required Vih and Vil levels for those gate inputs, and then figure out how many of those gates can be driven by the particular CMOS driver output before too much current is being drawn from the CMOS driver output (so that the Vih and Vil specs would not be met for the TTL input).
ok, that is what i needed to know.

Going the other way with TTL driving CMOS is more tricky
ummm...we are not doing those yet :tongue2:

thanks a lot!
 
  • #5
Berkeman, what is the main difference between ttl compatible and cmos compatible?
A 'non t' part has the conventional cmos input threshold, while ones with 't' has both cmos and ttl compatibility. Does that mean if i use a 't' part it won't drive a 'non t' part? I thought as long as it meets the voltage requirement threshold for high/low it should work either way?
 
  • #6
edmondng said:
Berkeman, what is the main difference between ttl compatible and cmos compatible?
A 'non t' part has the conventional cmos input threshold, while ones with 't' has both cmos and ttl compatibility. Does that mean if i use a 't' part it won't drive a 'non t' part? I thought as long as it meets the voltage requirement threshold for high/low it should work either way?

The main issue in TTL --> CMOS is Vih of the driven gate. Voh for TTL is quite low (3.4V), so Vih was set correspondingly low for TTL inputs (2V) to be able to recognize that Voh drive.

But CMOS circuits generally have Vih of Vdd - 1.5V or similar (sometimes 0.9*Vdd), so TTL's Voh high output signal will not reliably be recognized as high by a CMOS input. That's why the "T" families of logic exist. They have TTL-compatible Vih input thresholds. So instead of 74HC logic, you can use 74HCT logic, when driven by TTL logic. Same with 74AC --> 74ACT.
 
  • #7
ok, so mainly the difference is voltage level, and as long you meet the requirements to toggle the gate it should work. One more thing, aren't all chips these days made CMOS, because its lower power consumption than TTL? How do i know if a chip is TTL or when to use 'T' type package?
 
  • #8
edmondng said:
ok, so mainly the difference is voltage level, and as long you meet the requirements to toggle the gate it should work. One more thing, aren't all chips these days made CMOS, because its lower power consumption than TTL? How do i know if a chip is TTL or when to use 'T' type package?

Just look at Vih and Voh. Those are the big clues about whether the gate is TTL compatible or straight CMOS.

Yeah, CMOS is muh more common these days. But for backward compatibility (or for compatibility with 3.3V CMOS gate outputs), "TTL compatible" inputs are still widely used.
 

1. How does CMOS drive TTL?

CMOS (Complementary Metal-Oxide-Semiconductor) and TTL (Transistor-Transistor Logic) are two different types of digital logic families. CMOS uses MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) while TTL uses bipolar transistors. CMOS can drive TTL inputs because its output voltage levels are compatible with TTL input voltage levels.

2. What is the difference between CMOS and TTL?

Both CMOS and TTL are digital logic families, but they use different types of transistors which results in different characteristics. CMOS is known for its low power consumption and high noise immunity, while TTL is known for its higher speed and robustness.

3. What is fanout in CMOS and TTL?

Fanout refers to the number of inputs that can be driven by a single output without degrading the output voltage levels. In CMOS, the fanout is typically higher than in TTL due to the lower output impedance of MOSFETs compared to bipolar transistors.

4. Can CMOS drive TTL inputs with higher fanout than TTL?

Yes, CMOS can typically drive TTL inputs with a higher fanout due to its lower output impedance and higher output voltage levels. However, the maximum fanout will also depend on the specific CMOS and TTL devices used.

5. Are there any risks when driving TTL inputs with CMOS?

There are some risks when driving TTL inputs with CMOS, such as the possibility of a higher power consumption and voltage spikes due to the differences in characteristics between the two logic families. It is important to ensure that the voltage levels and current capabilities of the CMOS output are compatible with the TTL input to avoid any potential damage.

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