confused!! how do you calculate propagation delay of circuit and paths? Hello everyone, this book explains literally nothing about propgatation delay and how to calculate propagation delay of gates and the paths. And yet one of the questions says: http://img226.imageshack.us/img226/7273/lastscan7tl.jpg I found propagation delay of somthing but i don't know what... I looked up the Input load of a 2NAND gate and it said 1.00. Then I saw its formula listed in the table as: .04+.014*SL; SL is the sum of standard loads. So if there is 5 2NAND gates, it would be SL = 5*1.0 = 5 right? Then tpd = .05+.014*5 = .12ns; But the question gives me values of T_PHL = .30ns, and T_PLH = .50ns, so i have n oidea what i found above, and i don't know if it was finding the tpd of the gates or of the paths? Thanks. any help would be great!!