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Constructing a JK Flip-Flop: Troubleshooting Unexpected Outputs
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[QUOTE="Tom.G, post: 6874123, member: 581973"] Remember that TTL inputs (and most logic families) need to be connected to either a High (+5V) or Low (Gnd) logic level. If they are left floating they are considered to be in an 'Indeterminate' state. This is especially true for the HC series logic. The above could be why your Flip-Flop won't reliably Flip or Flop. I suggest that you connect each unconnected input thru a pullup resistor to +5V, and for the inputs that you want to change add a switch to Gnd. (In reality, several unconnected & unused inputs can share a pullup... their input currents when at logic High are tiny.) Don't give up! It looks like you are close to success. Cheers, Tom p.s. The circuit usually powering up to the same state is probably due to tiny differences in either response time or threshold levels between the individual gates. That is why Flip-Flop chips have a Set and and a Reset pin; so the designer can force their initial state. [/QUOTE]
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Constructing a JK Flip-Flop: Troubleshooting Unexpected Outputs
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