Decrement with J-K FF and gate/gates

  • Thread starter ogward
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In summary, the homework statement states that a synchronous down counter should only change state when the clock input CP is high. The proposed solution runs the counter downward counting on every clock pulse falling edge when i = 1 and pausing when i = 0.
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  • #2
It looks like the J and K inputs on the LSB are connected together and connected to one of the AND inputs. But nothing is connected to them as an input. Also the i input is missing. Is that your missing input? I know, I know, the answer is yes, and with that change your circuit is logically fine.

But the standard way of displaying flip-flops and gates is with the inputs on the left and the outputs on the right. Look at your circuit in a mirror and it would be properly displayed.
 
  • #3
LCKurtz said:
It looks like the J and K inputs on the LSB are connected together and connected to one of the AND inputs. But nothing is connected to them as an input. Also the i input is missing. Is that your missing input? I know, I know, the answer is yes, and with that change your circuit is logically fine.

But the standard way of displaying flip-flops and gates is with the inputs on the left and the outputs on the right. Look at your circuit in a mirror and it would be properly displayed.

what about now?
http://img35.imageshack.us/img35/3654/20111015001.th.jpg
 
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  • #4
Much better. And correct too.
 
  • #5
ogward, I got to tell you I almost had a heart attack when I looked at your first circuit diagram. My mind absolutely rebelled and I felt like making the sign of the cross to ward off evil (and I'm not even religious).

THAT'S the kind of response you're likely to get from an EE prof if you draw your circuits right to left. :smile:

(well, OK, I might be a BIT extreme)
 
  • #6
Hehe you are are probably right i just didn't like the Idea of heaving the MSB on the right side and the LSB on the left, made me a bit confused :P

Thanks for your pointers!
 
  • #7
ogward said:
i just didn't like the Idea of heaving the MSB on the right side and the LSB on the left, made me a bit confused

I'll be darned. It's been probably 35 years since I've designed those circuits but I DO remember now having exactly the same thought back when I started. You get used to it.
 
  • #8
ogward said:
Hehe you are are probably right i just didn't like the Idea of heaving the MSB on the right side and the LSB on the left, made me a bit confused :P

Thanks for your pointers!

If you like the LSB flip-flop on the right, just put it there. What's the problem?
 
  • #9
I thought it wouldn't work that way so I didn't want to experiment with something that works.
But I've tried it and it works, no problems.
 
  • #10
1. Homework Statement [/b]
Construct a synchronous down counter with J-K FFs and gate/gates. It should only count when the CP is high, look at the state diagram.
Is the original problem stated correctly? If CP is being used as the clock input into the JK flip-flops and it is always high, how do the flip-flops change state (count)?
 
  • #11
I formulated it wrong, it should count when the CP goes from 0 to 1 as stated in the state diagram.
 
  • #12
Maybe I am picking nits (to get out of doing housework...), but the state diagram is not clear about CP going from 0 to 1 causing a state transition. If I read the state diagram literally, when CP is 0: stay in same state, when CP is 1: change state. So when CP is 1, the diagram says that the states are constantly changing. Apparently that is not what you want to do, but that is what the diagram is saying (to me, anyway). I would propose adjusting your notation somehow to indicate if CP is either a 0 or a 1: stay in same state, if there is a transition from 0 to 1 (perhaps a rising edge symbol) go ahead and change state.
 
  • #13
Of course JK flip-flops change state at the falling edge of the clock. I wondered about the "only change state when the CP is high" too. That doesn't make sense to me for a clocked state machine using JK flip-flops. The proposed solution runs the counter downward counting on every clock pulse falling edge when i = 1 and pausing when i = 0.

It seems like a correct solution to a poorly worded problem to me. Perhaps the OP will return with his teacher's comments later.
 
  • #14
You guys are right. It is probably poorly worded because I had to translate everything from swedish to english.
And yes I can get back with my professors notes.
 

What is a J-K FF?

A J-K FF, or J-K flip flop, is a type of sequential logic circuit that stores one bit of data. It has two inputs, J (set) and K (reset), and two outputs, Q and Q̅. It can be used for storing data, as well as for counting and other operations.

How does Decrement with J-K FF work?

Decrement with J-K FF refers to the process of using a J-K flip flop and gate/gates to decrease a binary number by 1. This is done by setting the J and K inputs to specific values, depending on the current state of the flip flop, and then pulsing the clock input.

What is the difference between Decrement with J-K FF and Increment with J-K FF?

Decrement with J-K FF and Increment with J-K FF are two different operations performed using a J-K flip flop and gate/gates. Decrement decreases the binary number by 1, while Increment increases the binary number by 1. They differ in the values set for the J and K inputs and the direction of the clock pulse.

Can Decrement with J-K FF be used for any binary number?

Yes, Decrement with J-K FF can be used for any binary number. However, it is important to note that the circuit will only work properly if the flip flop is in the appropriate state for the given binary number. For example, if the binary number is 0, the flip flop must be reset before Decrement can be performed.

What is the purpose of using gates in Decrement with J-K FF?

Gates are used in Decrement with J-K FF to control the input and output signals of the J-K flip flop. They help to set the appropriate values for the J and K inputs and to generate a clock pulse for the flip flop. Without gates, the flip flop would not function properly and the Decrement operation would not be successful.

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