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Hey, I have some problems with my synchronous counter. Here is what I got. sorry for the big and bad quality of the pic. My scanner sucks :(

Here's the karnaugh map. I need to simplify them and use only NAND and inverters if needed.

http://img101.imageshack.us/img101/7335/hw4na.jpg [Broken]

I need to design it in pspice (Schematics) along with the truth table.

http://img101.imageshack.us/img101/1461/hw21sf.jpg [Broken]

Since the last two in the truth table is wrong, the whole thing is wrong. I know its probably some simple stuff but I can't figure it out. (2hrs now ) Thanks for anyone that can help. And if you want, I can upload the file for those who have pspice.

Edit: I just found 2 errors in the Karnaugh map JB, but I'm pretty sure it doesn't change much.

Here's the karnaugh map. I need to simplify them and use only NAND and inverters if needed.

http://img101.imageshack.us/img101/7335/hw4na.jpg [Broken]

I need to design it in pspice (Schematics) along with the truth table.

http://img101.imageshack.us/img101/1461/hw21sf.jpg [Broken]

Since the last two in the truth table is wrong, the whole thing is wrong. I know its probably some simple stuff but I can't figure it out. (2hrs now ) Thanks for anyone that can help. And if you want, I can upload the file for those who have pspice.

Edit: I just found 2 errors in the Karnaugh map JB, but I'm pretty sure it doesn't change much.

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