Insights Blog
-- Browse All Articles --
Physics Articles
Physics Tutorials
Physics Guides
Physics FAQ
Math Articles
Math Tutorials
Math Guides
Math FAQ
Education Articles
Education Guides
Bio/Chem Articles
Technology Guides
Computer Science Tutorials
Forums
General Engineering
Mechanical Engineering
Electrical Engineering
Aerospace Engineering
Nuclear Engineering
Materials Engineering
Trending
Featured Threads
Log in
Register
What's new
Search
Search
Search titles only
By:
General Engineering
Mechanical Engineering
Electrical Engineering
Aerospace Engineering
Nuclear Engineering
Materials Engineering
Menu
Log in
Register
Navigation
More options
Contact us
Close Menu
JavaScript is disabled. For a better experience, please enable JavaScript in your browser before proceeding.
You are using an out of date browser. It may not display this or other websites correctly.
You should upgrade or use an
alternative browser
.
Forums
Engineering
Electrical Engineering
DFT - zero padding avoids aliasing?
Reply to thread
Message
[QUOTE="LM741, post: 1197943, member: 53857"] hey guys - i can't seem to find find this statement anywhere - but it makes sense to me - could someone please verify. When you find the DFT of a signal say: x[0]=2, x[1]=4, x[2]=6, x[3]=8 - you will get four discrete points in frequency (per period) now if you zero pad the time signal such that you get x[0]=2, x[1]=4, x[2]=6, x[3]=8 x[4]=0, x[5]=0, x[6]=0, x[7]=0 - you will once agin get four discrete frequency points but now the gap between each period will be larger (thus decreasing any chances of aliasing) thnks [/QUOTE]
Insert quotes…
Post reply
Forums
Engineering
Electrical Engineering
DFT - zero padding avoids aliasing?
Back
Top