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Digital Logics Synchronous Counter with Asynchronous Reset

  1. Nov 30, 2011 #1
    1. The problem statement, all variables and given/known data
    Design a sequential circuit, a modulo 9 counter that uses T-architecture. The counter content should be diplayed on a seven segment display and by a set of LEDs. Basically, I have to make a synchronous counter and a asynchronous reset using T FF's. We only have JK FF's though so we have to use them to create the T's. The JK's that we have have a CLR input, which I think has something to do with resetting it, but I can't find that specific info on it and I don't know what I'm supposed to be plugging into it. I'm supposed to fill out a truth table for the RESET and design a circuit with the RESET circuit included and since I can't seem to figure out the reset part of things I'm sort of at a loss

    2. The attempt at a solution
    Here's what I came up with from the internet and my text book, but I missed quite a bit of class recently and I'm having a tough time catching up with this stuff. Any help at all somebody could offer would be really appreciated.
    http://imageshack.us/photo/my-images/651/imageinv.jpg/
     
  2. jcsd
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