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Double negation in logic circuit

  1. Apr 7, 2009 #1
    Probably a very simple answer here...

    I'm creating a logic circuit using only NAND gates. I have 4 inputs, A B C and D, but I am just using a single 'path'/part of the equation for this question, that being A'B = F, F being the output.

    Full equation...

    AB'C + AB'D' + A'B + A'C = F
    F has a NAND gate directly before it, negating any 'paths' leading into F
    I'm just using this highlighted part of the equation as an example

    Solutions...

    I have two ideas, I just want to know if one is more appropriate or correct than the other.

    a)
    Firstly, split A and feed through NAND gate, giving A'
    Run A' and B through NAND gate to combine into A"B'
    PROBLEM: The input of that path to F needs to be A'B, so A"B' will need to be split and passed through a NAND gate to give the correct input into the final gate, so...
    Split A"B' and pass through NAND gate, giving A"'B" (DeMorgans cancels to A'B - correct?)
    By my thinking, that should work, but it has a lot of split>NAND gate situations in there.

    b)
    Split B and feed through NAND gate, giving B'
    Run A and B' through NAND gate, giving A'B"
    PROBLEM: This is where I get muddled...
    Because there's a single negation on A and a double on B, my mind is saying that I can cancel off the one's on B, leaving only A negated, giving the A'B I need BUT...
    Canceling that double negation over B would be considered 'breaking the bar' in DeMorgans, and require me to change the sign between A and B, giving a completely different equation (say A' + B, right?).

    So I have a very strong feeling that a) is the option to go for. Is my thinking right?
     
  2. jcsd
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