Exploring Complex 10-Week FPGA Projects

In summary,You are looking for inspiration for a 10 week project. You mention that you want to produce a sampler that has the capability to generate up to 256 simultaneous voices. You also mention that you are interested in behavior simulation, design methodology, and chip synthesis.
  • #1
digitalblggr
42
0
Any ideas for 10 week FPGA project??

I am looking for something on complexity of FM radio receiver , MPEG decoder etc.
 
Last edited by a moderator:
Engineering news on Phys.org
  • #2
digitalblggr said:
Any ideas for 10 week FPGA project??

I am looking for something on complexity of FM radio receiver , MPEG decoder etc.

Sounds like fun! What areas of digital electronics interest you most? Communications? Processor design? DSP? Encryption?

What resources do you have available? Compiler = ? Simulator = ? FPGA prototype board = ? IO devices = ?

Getting some more info from you would help us throw out some better ideas. Dang, makes me wish I was back in school... :tongue2:
 
  • #3
Just an idea, but last year I had planned to produce a sampler (for musical voices), but never got around to actually doing it. It would have had capability for producing up to 256 simultaneous voices, with capability for substituting any of several thousand into this array from its disk very quickly. (It would have far greater capacity than generating voices it in software.) For this I had selected a low-cost Altera Cyclone board. They fit best into the desired application at that time (Who knows which would fit best today - - maybe Altera, maybe Xilinx - - .) It was to have full self contained capability, and interface to a standard computer in several ways.

It was designed also to have its own processor for operational control and for interfacing to its internal disk drives, to outside devices like PC's and for controlling the swapping of voices and starting, timing and stopping their operations. What I hadn't decided on was whether it would be best to use an on-board soft processor or an external CPU. All in all it was to have had considerable capability, much of which I didn't mention.

I'm sure you could come up with a comparable design, so whatever you decide on, best of luck. I'm not susre about the ten-week time limit though.

KM
 
  • #4
Well I guess the most important question would be what is your skill set? No use choosing a complicated design and you won't understand what you are doing or deadlines will catch up to you.

Let me offer a bit of advise independent of projects you will choose. Verification is probably that aspect of design which will probably take over 50% of your overall design time. You need to follow a good design methodology to be successful. If you don't follow that then you can be the best coder but time will catch up on you! If you are using Xilinx then make liberal use of Chipscope or for Altera use Signaltap for on-chip verification. Its best to do a pre-synthesis design entry of these verification and debug modules. The best error is when the system doesn't work at all. Its like a gift from the gods. The worst is when it works today and glitches tomorrow. Its a lot of fun to look through 50ms of timing diagrams :D

Also do your behavioral simulation, then simulate again after synthesis, and then do a timing simulation. If you also cannot code for synthesis very well then you will doing a lot of iterations in your design flow, hence you need to follow a good methodology.
 
  • #5
Hmmm, would be cool to take a digital audio stream straight into FM in the digital domain. I haven't seen that done.

One thing that I did do, that turned out pretty simple, was to make a real time reflectrometry machine based on a pld. It was unique in that the return patern came back very slow.
It works by having two identical pseudorandom generators, which operate from a common 100MHz clock. When a second, low speed clock ticks, it steals an HF clock pulse from one of the PRN generators. Given a PRN length of n-1, every n-1 ticks of the low rate clock will lock the two PRN generators in phase.

For all other ticks of the low rate clock, the PRN signals are identical, but shifted in time.

Now for the fun. Output one of the PRNs into the Local oscillator input of an RF mixed chip. Next, transmit the second PRN over your medium, which must also couple into the RF mixer.

My first time through, I used a direction coupler to couple in the transmitting PRN (straight from the PLD!) into a length of coax. I ran the other power of the coupler into the RF mixer and watched the output.

You can see when the two PRNs are in phase, because there's a large peak, and over time you can see the reflection from the end of the coax. You can short / open the coax to see the difference in echo. You can also see "ghost" echoes due to accidental correlations of the PRN function. I had to play around with the taps of the PRN to find one that had very weak hosts.

Lot of fun. It might even work out with a laser diode, pin amp and telescope. I never got that far.
 
  • #6
@ kenneth_man : sounds interesting but i am not sure I would want to do that

@ Mike in plano : haha got to love those pld's ..did you use ABEl or PALASM?
your project sounds neat will definitely think more along those lines

@ ranger : i am alright in VHDL I guess ..I did couple of small scale projects like Atmel AVR 8-bit CPU. Most of my large scale projects were in DSPs.

@berkeman : I am using Xilinx ISE webpack 11 right now. I also have access to Aldec and Modelsim. As far as FPGAs go I either have an option of buying one or using one of the big ones I have access to in the lab ( I will make that decision based on the scale of my project and cost obviously). I have designed and implemented 8-bit CPU before , so I guess I am not that excited about processor design. I definitely want to try out something new and exciting. I am working on independent project on SDR(Software Defined Radio) using Blackfin micropocessor. So, I don't think I want to do the same in FPGA. While I was thinking of doing MPEG-2 decoder for digital video a while ago I think i won't be able to wrap it up in 10 weeks. Other option is to do JPEG decoder but it's not that exciting. I don't know much about encryption but doing a project in that field sounds interesting, and I will get to learn something new. Also, I was thinking along the lines of voice recognition or speech synthesis.

---------------------------------------------------------------------------------------
www.digitalblggr.blogspot.com
 
  • #7
digitalblggr said:
@ kenneth_man : sounds interesting but i am not sure I would want to do that

@ Mike in plano : haha got to love those pld's ..did you use ABEl or PALASM?
your project sounds neat will definitely think more along those lines

@ ranger : i am alright in VHDL I guess ..I did couple of small scale projects like Atmel AVR 8-bit CPU. Most of my large scale projects were in DSPs.

@berkeman : I am using Xilinx ISE webpack 11 right now. I also have access to Aldec and Modelsim. As far as FPGAs go I either have an option of buying one or using one of the big ones I have access to in the lab ( I will make that decision based on the scale of my project and cost obviously). I have designed and implemented 8-bit CPU before , so I guess I am not that excited about processor design. I definitely want to try out something new and exciting. I am working on independent project on SDR(Software Defined Radio) using Blackfin micropocessor. So, I don't think I want to do the same in FPGA. While I was thinking of doing MPEG-2 decoder for digital video a while ago I think i won't be able to wrap it up in 10 weeks. Other option is to do JPEG decoder but it's not that exciting. I don't know much about encryption but doing a project in that field sounds interesting, and I will get to learn something new. Also, I was thinking along the lines of voice recognition or speech synthesis.

---------------------------------------------------------------------------------------
www.digitalblggr.blogspot.com

Awesome stuff! Great projects. Send me your resume when you graduate. We should talk.
 
  • #8
Hello DB,

As I recall, that was ABEL with a 64 cell Lattice part. Now, they push the MachXO series which is nicer, but must be programmed in VHDL or Verilog.

If I had the wherewithal, I think I'd attempt a chirp transform. I've been interested in ultra lower power amateur transmitters since a friend built one high school and on good nights was able to communicate around the country with in Morse.

Now, I wonder whether staccato chirps would prove to have a better S/N ratio than the simple CW he used.
 
  • #9
I did an MP3 decoder using the Altera DE2 board. The end result was that you can plugin a pair of head phones into the board and listen to the mp3 file. It was pretty awesome. You can definitely pull it off in less than 10 weeks with resources you will find online.

If you want to make it interesting, try making a Xilinx embedded system with two Microblaze processors. One processor is running some RTOS or eOS like uCLinux. Linux can fetch the files from a mounted NFS or similar and dumps them to main memory. The second processor essentially only does the MP3 encoding.
 
  • #10
Hi,

I'm doing a project on image compression using bit plane coding technique.

There is an algorithm which has a lot of equations which include log functions, exponent functions etc.

how can i implement these functions using VHDL? is it direct formula method or is there any other way?

Also I would like to know, how to implement a variable length coding in VHDL? I have a list of integer values and depending upon some arithmetic operation , i need to include variable number of bits to each integer.. Can anyone please give me some idea as to how to code these logic in VHDL?

Thanks in advance !

Rajeev
 
  • #11
digitalblggr said:
Any ideas for 10 week FPGA project??

I am looking for something on complexity of FM radio receiver , MPEG decoder etc.

-----------------------------------------------------------------------------

www.digitalblggr.blogspot.com

A Commodore 64 ! Unrealistic for 10 weeks maybe, but fun !
 
  • #12
@berkeman : thanks for the support

@DanP : I really love commodore 64, but I think I won't learn much since I have already done 8-bit processor before.

I have finally zeroed on JPEG decoder.( My other top choice was LPC speech synthesis but its too easy for a 10 week project, and a bit boring).

@ranger : Great advice. Actually a prof at my school has a very similar system with a Xilinx chip and a microprocessor running Linux which he might lend me for 10 weeks. It also has DRAM attached which would be perfect for storing JPEG images. I am planning to do most of the decoding in VHDL , and do some grungy parts in assembly/C using either MicroBlaze, PicoBlaze or NIOS.

To output bitmap image I was thinking of doing either a graphical LCD , or VGA. If I have some extra time I was thinking of maybe doing HDMI instead. I am not sure though how much more complicated HDMI protocol is, than VGA.

-------------------------------------------------------------------------------------
www.digitalblggr.blogspot.com
 

1. What is an FPGA?

An FPGA (Field Programmable Gate Array) is a type of integrated circuit that can be programmed and reprogrammed to perform complex logic functions. It consists of a grid of logic blocks connected by programmable interconnects, allowing it to be customized for specific applications.

2. How long does it typically take to complete a 10-week FPGA project?

The time it takes to complete a 10-week FPGA project can vary depending on the complexity of the project and the experience level of the programmer. However, on average, it can take anywhere from 4-6 weeks to complete the design and implementation phase, and another 4-6 weeks for testing and debugging.

3. What are some common challenges when working on complex FPGA projects?

Some common challenges when working on complex FPGA projects include managing timing constraints, optimizing resource usage, and dealing with complex interconnections between different logic blocks. It is also important to have a good understanding of the target hardware and the desired functionality in order to successfully complete the project.

4. How important is project planning when working on complex FPGA projects?

Project planning is crucial when working on complex FPGA projects. It helps to set clear goals and milestones, allocate resources effectively, and identify potential roadblocks early on. This can ultimately save time and ensure the project is completed successfully.

5. What are some useful tools for exploring and implementing complex FPGA projects?

Some useful tools for exploring and implementing complex FPGA projects include design software such as Xilinx Vivado or Intel Quartus, simulation tools like ModelSim, and debugging tools like SignalTap or ChipScope. It is also helpful to have a good understanding of hardware description languages like Verilog or VHDL.

Similar threads

  • Electrical Engineering
Replies
4
Views
1K
  • Electrical Engineering
Replies
5
Views
2K
  • Electrical Engineering
Replies
3
Views
1K
  • Electrical Engineering
Replies
9
Views
2K
Replies
6
Views
831
Replies
6
Views
1K
Replies
68
Views
3K
Replies
4
Views
3K
Replies
1
Views
495
  • Electrical Engineering
Replies
4
Views
761
Back
Top