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Gate oxide breakdown voltage

  1. Mar 8, 2014 #1
    For a NMOS transistor, is there a difference in gate oxide breakdown voltage if we apply a positive bias on gate and a negative bias on gate? (assume S/D/bulk are ground)
  2. jcsd
  3. Mar 9, 2014 #2


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    Science Advisor

    According to the paper
    Hokari, Y, "Stress voltage polarity dependence of thermally grown thin gate oxide wearout" IEEE Transactions on Electron Devices, vol. 35, no 8, August 1998

    there is a difference. In fact time-dependent dielectric breakdown lifetimes is one order-of-magnitude longer for positive biases and you get tunneling quicker with negative stress.
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