Design a 16 State Counter with 5 JK FF

  • Thread starter david90
  • Start date
In summary, a 16 state counter is an electronic circuit used for counting up to 16 distinct states or numbers. It requires four JK flip-flops to design, with each flip-flop representing one bit of information. These flip-flops are connected in a cascading manner with a common clock signal to synchronize their operation. The clock signal controls the timing of state changes and ensures orderly counting.
  • #1
david90
312
2
"Design a counter using jk ff that is a 16 state device which counts (sequences) in the following sequence: 0 2 4 6 A C E 3 7 F 0"

for 16 states, u would need 5 jk ff since 4 jk only go up to 15 right?
 
Engineering news on Phys.org
  • #2
4 JK's have 16 states--0 to 15
 
  • #3
ops. Thanks for clearing it up.
 
  • #4
How can I make this counter with a 74LS194 shift register and a programmed 27C256 EEPROM with the count sequences? The assigment said no shifting from the shift register.
 
  • #5
For the 194, how does the "do nothing" option work? There are left shift, right shift then do nothing.
 

1. What is a 16 state counter?

A 16 state counter is an electronic circuit that can count up to 16 distinct states or numbers. It can be used in various applications such as in calculators, digital clocks, and other devices that require counting.

2. What is a JK flip-flop?

A JK flip-flop is a type of sequential logic circuit that has two inputs, J and K, and two outputs, Q (the current state) and Q̅ (the opposite of the current state). It can be used to store one bit of information and can be triggered by a clock signal to change its state.

3. How many JK flip-flops are needed to design a 16 state counter?

To design a 16 state counter, we need four JK flip-flops. Each JK flip-flop can store one bit of information, and with four flip-flops, we can store four bits, which is enough to represent 16 different states (2^4 = 16).

4. How do you connect the JK flip-flops to design a 16 state counter?

The JK flip-flops are connected in a cascading manner, with the output of one flip-flop connected to the input of the next one. The J and K inputs of each flip-flop are connected to a common clock signal, and the outputs are connected to the inputs of the next flip-flop in sequence.

5. What is the role of the clock signal in a 16 state counter with JK flip-flops?

The clock signal is used to synchronize the operation of the JK flip-flops in the counter. It controls the timing of the state changes and ensures that all the flip-flops are triggered at the same time, allowing the counter to count in a sequential and orderly manner.

Similar threads

Replies
10
Views
3K
  • Electrical Engineering
Replies
15
Views
2K
Replies
7
Views
839
  • Electrical Engineering
Replies
4
Views
1K
  • Engineering and Comp Sci Homework Help
Replies
1
Views
2K
  • Electrical Engineering
Replies
6
Views
843
  • Engineering and Comp Sci Homework Help
Replies
8
Views
1K
  • Electrical Engineering
Replies
3
Views
4K
  • Electrical Engineering
Replies
10
Views
3K
Replies
2
Views
2K
Back
Top