How to determine the output impedance of cmos gates?

In summary, to determine the output impedance of cmos gates, one can use the Voh/Ioh and Vol/Iol numbers.
  • #1
likephysics
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2
How do you determine the output impedance of cmos gates?
 
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  • #2
likephysics said:
How do you determine the output impedance of cmos gates?

A reasonable approximation is to look at the Voh/Ioh and Vol/Iol numbers.

Are you wanting the Zout to help you calculate the value of resistance to use for a back termination? What is the Zo of your PCB transmission line?


EDIT -- BTW, when I said Voh/Ioh number, I obviously meant (Vcc-Voh)/Ioh. Sorry if there was any confusion.
 
  • #3
I have to do this fairly often - because I'm constantly using the gates as parts of "analog" systems.

Rule 1, The output impedance for a low state is not necessarily the same as that of a high state. Most often, the gates have lower resistance in the low state.

Rule 2, The output impedance varies with power supply voltage. As the supply voltage increases, the output impedance goes down.

Rule 3, The output impedance will vary from part to part

So, how to get your "typical" impedance as a function of supply voltage:

As often as not the data sheets will not specify the voltages and currents that you need at the voltage you operate. No need to worry. The manufacturer usually gives the pull up and pull down voltages along with their associated current for at least three power supply voltages.

Just compute your various pull up resistances over temperature and use second order fit to find what the resistance is at your supply voltage. The same is true for the pull down resistances.
 
  • #4
Exactly! I am trying to calculate Zout to fix the series termination resistor value.

Are you sure about (Vcc-Voh)/Ioh.
Voh/Ioh gives the correct value.
 
  • #5
likephysics said:
Exactly! I am trying to calculate Zout to fix the series termination resistor value.

Are you sure about (Vcc-Voh)/Ioh.
Voh/Ioh gives the correct value.

The Voh number is for when the output stage is pulling up, so the voltage drop is across the upper CMOS transistor. Its output Z is (Vcc-Voh)/Ioh, since that transistor is sourcing the Ioh current.

You can also just put a pot at the series termination position, and vary it to minimize the ringing at the other end of the TL. That's often the easiest way to find out a good value for the back termination resistor.

BTW, how long is your TL? How have you made it? Remember to keep it on the top layer above the inner GND plane layer, and don't feed it through to the other side (since running on the other side you won't be adjacent to the GND plane anymore, so Zo will be different and not controlled).
 
  • #6
Right on the money for both (Vcc-Voh/Ioh). Likewise, but different is (Vol/Iol). Also good is the trim and tweek technique, but many apps don't need to run all that fast. So, you can often put an absurdly large resistor at the source and not worry about it (220 or 330 is common)
This high value resistor techniques is great for crossing the digital to analog barrier. I often use as much as 1K at the barrier so that the sharp rise times don't induce ringing on the ground plane.

Of course, if you really want to run fast edges, a complimentary signal / trace is the most painless way to go. Ah la GTL logic : )
 
  • #7
Guys, I tried to calculate the Zo of some ICs.
For a clock buffer - CDCVF25081
http://focus.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=cdcvf25081&fileType=pdf
Zo = (Vdd-VOH) / IOH. This gave me (datasheet pg.5) Zo = 0.9/12mA = 75 ohms
From the IOH row, Z0 = Vo/IOH = 1.65/30mA = 55 Ohms
VOL/IOL = 0.8/12mA = 66.67Ohms

Simulation gave me close to 50 Ohms. (55 rising edge and 51 falling edge).

Now For another part CY25811
http://www.datasheetcatalog.org/datasheet2/e/0lajeyeqd5a8q0ytgz70kd4gfcky.pdf
Zo = 2.97-2.4/4mA = 142.5 Ohms
Zo = VOL/IOL = 0.4/4mA = 100 ohms

Now for one more - P2811B (onsemi)
http://www.datasheetcatalog.org/datasheet2/e/0lajeyeqd5a8q0ytgz70kd4gfcky.pdf
Zo = 3.3-2.5 /15mA = 53 Ohms
Zo = VOL/IOL = 0.4/15mA = 26 Ohms (This is given as output imp in datasheet)

Last one
Cyclone FPGA
http://www.altera.com/literature/hb/cyc/cyc_c51004.pdf
Pg 2 LVTTL

Zo = (3-2.4)/24mA = 25 Ohms
Zo = VOL/IOL = 0.45/24mA = 18.75 Ohms

The Zo from simulation is much less (7 ohms)!
 
  • #8
likephysics said:
Guys, I tried to calculate the Zo of some ICs.
For a clock buffer - CDCVF25081
http://focus.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=cdcvf25081&fileType=pdf
Zo = (Vdd-VOH) / IOH. This gave me (datasheet pg.5) Zo = 0.9/12mA = 75 ohms
From the IOH row, Z0 = Vo/IOH = 1.65/30mA = 55 Ohms
VOL/IOL = 0.8/12mA = 66.67Ohms

Simulation gave me close to 50 Ohms. (55 rising edge and 51 falling edge).

Now For another part CY25811
http://www.datasheetcatalog.org/datasheet2/e/0lajeyeqd5a8q0ytgz70kd4gfcky.pdf
Zo = 2.97-2.4/4mA = 142.5 Ohms
Zo = VOL/IOL = 0.4/4mA = 100 ohms

Now for one more - P2811B (onsemi)
http://www.datasheetcatalog.org/datasheet2/e/0lajeyeqd5a8q0ytgz70kd4gfcky.pdf
Zo = 3.3-2.5 /15mA = 53 Ohms
Zo = VOL/IOL = 0.4/15mA = 26 Ohms (This is given as output imp in datasheet)

Last one
Cyclone FPGA
http://www.altera.com/literature/hb/cyc/cyc_c51004.pdf
Pg 2 LVTTL

Zo = (3-2.4)/24mA = 25 Ohms
Zo = VOL/IOL = 0.45/24mA = 18.75 Ohms

The Zo from simulation is much less (7 ohms)!

How are you doing the simulations? Are you getting the models from the manufacturers' websites? Can you provide links to the models?

Can you test the static Zo of some of those gates? Just use a pot and a DVM to measure the static Zo.

Can you check the actual dynamic TL Zo of some of those gates, using a pot and a length of whatever transmission line? Just open circuit the TL and connect your 'scope to the end, and adjust the back termination pot to eliminate the ringing seen by the 'scope. You can use coax or TP or whatever TL cable you have laying around...
 
  • #9

1. What is the purpose of determining the output impedance of CMOS gates?

Determining the output impedance of CMOS gates is important for understanding the electrical characteristics of the gate. It helps in designing and optimizing circuits, as well as predicting the behavior of the gate in different operating conditions.

2. How do you calculate the output impedance of CMOS gates?

The output impedance of CMOS gates can be calculated using the following formula: Zout = (Ron||Rop)/(1 + gmp/gmn). Ron and Rop are the resistances of the pull-up and pull-down transistors, while gmp and gmn are the transconductances of the pMOS and nMOS transistors, respectively.

3. What factors affect the output impedance of CMOS gates?

The output impedance of CMOS gates is affected by the size and type of transistors used, the supply voltage, and the operating frequency. In general, larger transistors and higher supply voltages result in lower output impedance, while higher frequencies can increase the output impedance.

4. Why is the output impedance of CMOS gates typically low?

The output impedance of CMOS gates is typically low because CMOS technology uses complementary pairs of transistors, which provide a low impedance path to both the supply and ground. Additionally, the use of large transistors and low supply voltages also contribute to the low output impedance.

5. Can the output impedance of CMOS gates be adjusted?

Yes, the output impedance of CMOS gates can be adjusted by changing the sizes of the transistors or the supply voltage. However, this can also affect other electrical characteristics of the gate, so it is important to carefully consider the trade-offs when making adjustments.

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