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Implementing a High Z output

  1. Dec 19, 2008 #1
    How is high impedance output implemented in logic gates?
    If transistors(BJTs) are used to implement a Not gate, what would be the ckt when the output is high Z?
     
  2. jcsd
  3. Dec 20, 2008 #2
    Why would you want a hi-z output?
     
  4. Dec 20, 2008 #3
    Why not?
    Just curious to know how it is implemented at the circuit level.
     
  5. Dec 20, 2008 #4

    dlgoff

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    Gold Member

    Not quite sure what your are asking. When it comes to impedance of logic gates, most outputs are low impedance. Maybe you are thinking of three state buffers.
    http://en.wikipedia.org/wiki/Logic_gate
     
  6. Dec 20, 2008 #5
    I suppose if it is logic rather than an amplifier it is DC analysis as you are only interested in the on or off state of an output transistor except maybe dynamic analysis starts to become more significant at higher switching speeds when such as device capacitance plays a part. DC wise a high value of the collector to supply resistor will give a high Z ouput but it is not a desirable thing to have as following gates will load a hi-z output more and redcuce the 'fan out'. Maybe it will reduce power requirements in gates??
     
  7. Dec 20, 2008 #6

    berkeman

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    Staff: Mentor

    I'm pretty sure that's what he's asking about -- thanks for posting the link.

    Tri-state digital outputs are important for shared memory busses, for example. A microcontroller enables the outputs of ROM and RAM and Flash memory chips at different times when it wants to read from them. When not enabled to drive the data bus, these memory chips Tri-state their data outputs; The outputs are forced to high-Z by turning off both the pullup and pulldown transistors at the outputs stages.
     
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