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Input and Output Load Lines

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Homework Statement
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I am not sure i know what is meant by the input load line and the output load line in parts b and c. I tried looking it up in my book (fundamentals of microelectronics by razavi) but to no avail. Any help is appreciated.
 
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Thanks for the post! This is an automated courtesy bump. Sorry you aren't generating responses at the moment. Do you have any further information, come to any new conclusions or is it possible to reword the post?
 

NascentOxygen

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To derive the output load line imagine removing everything from the circuit except the RD and RS resistors, then plotting I vs. V where I is the current in those resistors and V is the voltage across the "empty gap" between them. It is immaterial what element you insert into that gap, the current through it and voltage across it are fully constrained by that pair of resistors together with the supply voltage, and this gap's I vs. V plot is known as the output DC load line.
 

LvW

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* Input load line:
VGS=VG-VS=VG-IDS*RS.
From this: IDS=VG/RS-VGS/RS.
This gives a straight line crossing the IDS=f(VGS) graph in one point.

* Output load line
VDS=VD-VS=VDD-IDS*RD-IDS*RS=VDD-IDS*(RD+RS).
From this: IDS=(VDD-VDS)/(RD+RS)=VDD/(RD+RS)-VDS/(RD+RS).
This load line has a negative slope.
 

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