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Inverter Transfer Function

  1. Aug 5, 2012 #1
    Regarding the transfer function of the inverter,why do we take the transition region between the slopes of '-1'.Is there any special significance for this slope in this context of inverter.
    Thank you all
     
  2. jcsd
  3. Aug 5, 2012 #2

    NascentOxygen

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    Staff: Mentor

    Are you talking about a digital inverter (a NOT gate), or an analog inverter (e.g., op-amp)? :confused:

    An analog inverter has a gain, Vo/Vin = -1, but only while not being overdriven into distortion.
     
  4. Aug 5, 2012 #3
    Oh don't mind me,I was talking about the Digital Inverter. Thank You
     
  5. Aug 5, 2012 #4

    uart

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    The digital inverter is very non-linear. It may have an average gain of -1 over the full range of input/output voltages, but during the transition from logic 0 to logic 1 (or visa-verse) the incremental gain magnitude will typically be larger value.
     
  6. Aug 6, 2012 #5

    NascentOxygen

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    For the NOT gate, this narrow linear region has a |Vo/Vin| slope of much greater than 1. What you might be thinking of is that some families of gates allow their simpler inverting gates to serve as crude op-amps, so if you equip such a gate with a feedback resistor and an equal-value input resistor you produce an inverting amplifier of small-signal gain equal to -1.
     
  7. Aug 8, 2012 #6
    So can we say that,the slope in the transition region tends to increase at a very high rate which makes it,not probable to get the logic.What if the transition region has not a very steep slope?
     
  8. Aug 8, 2012 #7

    NascentOxygen

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    The output in that region of operation is neither logic HIGH nor LOW. This may or may not be important to any application. It also means for most families of logic gates that the gate in that transition region is dissipating many times (possibly x100) more power than when fully ON or fully OFF.
     
  9. Aug 9, 2012 #8
    To answer you original question, we take the transition region to be between the two points where the gain is -1 as a convention. It's arbitrary. It's still important, though, because only by agreeing on that can we compare results of different technology.

    And the slope (or "gain") of a digital inverter is not really that steep in modern deep submicron technology. The peak slope is typically less than -10 nowadays. This is one reason power dissipation is increasing in scaled CMOS technologies.

    In old logic (like you would see in a 7400 series chip) the gain was MUCH larger.
     
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