JK Flip-Flops counter problem

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In summary, the conversation discusses the use of J-K flip-flops to design a synchronous up/down counter. The counter counts "up" through the sequence 1 2 6 3 5 7 if the input switch UP is 1, and "down" through the sequence 7 2 1 5 3 6 if UP is 0. The person asking for help has found a similar circuit in their book but needs guidance on how to adapt it to the given question. They have tried various methods but are struggling to find a simple and efficient solution. Suggestions are made to use a next state karnaugh map table to solve for the J and K inputs.
  • #1
Mark200
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Exam question:

Use J-K flip-flops to design the logic for a synchronous up/down counter that counts "up" through the sequence 1 2 6 3 5 7 f the input switch UP is 1, and "down" through the sequence 7 2 1 5 3 6 if UP is 0. Verify that the counter is self-starting.


What I know so far:

Ok so in my book I've found a similar circuit, except it's to count through the sequence 1 2 3 4 and so on. And I'm not sure at all how I'd go about changing the circuit to work for the question above. The circuit I have is:

article1.sync_bin_c.gif


Any ideas?
 
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  • #2
Hi Mark200, welcome to PF!

Hmmm...so it looks like you'll need three bits. And you want to go through the sequence:

001
010
110
011
101
111

It looks like the circuit you have makes great use of the fact that setting J = K = 1 toggles Q to change state, and setting J = Q = 0 keeps it the same. So I would expect that what would change would be which output of which AND gate goes where. That's all I've got though, short of actually trying to draw out different circuits.
 
  • #3
Ok I'm afraid I'm going to need to ask for more help on this question! I failed my exam and I have to do a repeat exam, and it's tomorrow hah. And this question came up on the original exam!

I've been trying to figure out how to do it. I found a way, but it involves having about three logic gates for every single input and it's extremely messy. There must be an easier way. I tried to scan my work so far in but my scanner isn't working! I've thought about changing where the outputs go but I don't think that'll work.

Any ideas?? As much help as possible would be great! Even if it doesn't come up on the exam tomorrow it'd just be a relief to finally know how to do this question
 
  • #4
Mark200 said:
Exam question:

Use J-K flip-flops to design the logic for a synchronous up/down counter that counts "up" through the sequence 1 2 6 3 5 7 f the input switch UP is 1, and "down" through the sequence 7 2 1 5 3 6 if UP is 0. Verify that the counter is self-starting.


What I know so far:

Ok so in my book I've found a similar circuit, except it's to count through the sequence 1 2 3 4 and so on. And I'm not sure at all how I'd go about changing the circuit to work for the question above. The circuit I have is:

article1.sync_bin_c.gif


Any ideas?

Mark200 said:
Ok I'm afraid I'm going to need to ask for more help on this question! I failed my exam and I have to do a repeat exam, and it's tomorrow hah. And this question came up on the original exam!

I've been trying to figure out how to do it. I found a way, but it involves having about three logic gates for every single input and it's extremely messy. There must be an easier way. I tried to scan my work so far in but my scanner isn't working! I've thought about changing where the outputs go but I don't think that'll work.

Any ideas?? As much help as possible would be great! Even if it doesn't come up on the exam tomorrow it'd just be a relief to finally know how to do this question

I'm sure it's a bit late for your exam. But instead of trying to find some ad-hoc jerry-rig that works, why don't you make a next state karnaugh map table with variables s, y0,y1,y2 from which you can solve for the J and K inputs? Takes a little time but also removes all the trial and error guesswork.
 

1. What is a JK flip-flop counter and how does it work?

A JK flip-flop counter is a digital circuit that can store and count binary values. It consists of two inputs (J and K) and two outputs (Q and Q'). The inputs control the state of the flip-flop, and the outputs display the current count. When the clock signal is triggered, the flip-flop will change its state according to the inputs and the previous state. This allows it to count up or down, depending on the circuit design.

2. What is the difference between synchronous and asynchronous JK flip-flop counters?

Synchronous JK flip-flop counters use a clock signal to trigger the state changes, ensuring that all flip-flops change at the same time. This allows for a more stable and reliable count. Asynchronous JK flip-flop counters, on the other hand, do not use a clock signal and can have varying state changes depending on the propagation delay of each flip-flop. They are simpler in design but may result in glitchy or incorrect counts.

3. How can I design a JK flip-flop counter for a specific number of counts?

To design a JK flip-flop counter for a specific number of counts, you will need to use a combination of flip-flops and logic gates. The number of flip-flops needed will depend on the number of counts you want to achieve. You will also need to carefully design the input and output logic to ensure that the counter counts up or down correctly and resets at the desired count.

4. Can I cascade multiple JK flip-flop counters to achieve a larger count?

Yes, you can cascade multiple JK flip-flop counters to achieve a larger count. This is known as a ripple counter. Each flip-flop in the cascade will contribute to one digit in the overall count. It is important to note that the propagation delay of each flip-flop will add up, so the overall count frequency may be slower than that of a single flip-flop counter.

5. What are some common applications of JK flip-flop counters?

JK flip-flop counters are commonly used in digital clocks, electronic counters, frequency dividers, and other digital systems that require counting or timing functions. They can also be used in combination with other digital circuits to create more complex functions such as shift registers and sequence detectors.

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