- #1

ravenprp

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Hi, I have a four-bit binary counter utilizing two 74LS76 and two 74LS74 integrated circuits. I've attached a picture.

I have to write a lab report, and this is what I have so far:

If we were to label each flip-flop from 1 to 4 (left to right) in Figure 3B, Appendix B, each successive output is halved. Assume f0 is the original clock pulse.

o The general equation for the frequency yields: fN = f0 / 2N where N is the number of the respective flip-flop in sequence.

The output of flip-flop #1: f0 / 2

The output of flip-flop #2: f0 / 4

The output of flip-flop #3: f0 / 8

The output of flip-flop #4: f0 / 16

Disregard the Appendix refernece. Is this correct?

EDIT -- added the picture, I forgot

I have to write a lab report, and this is what I have so far:

If we were to label each flip-flop from 1 to 4 (left to right) in Figure 3B, Appendix B, each successive output is halved. Assume f0 is the original clock pulse.

o The general equation for the frequency yields: fN = f0 / 2N where N is the number of the respective flip-flop in sequence.

The output of flip-flop #1: f0 / 2

The output of flip-flop #2: f0 / 4

The output of flip-flop #3: f0 / 8

The output of flip-flop #4: f0 / 16

Disregard the Appendix refernece. Is this correct?

EDIT -- added the picture, I forgot