Hi guys. Say you have a RCL circuit with a resister, capacitor, and inductor in series without a voltage source. You can write V_R + V_C + V_L = 0 by the loop rule. But assuming everything is not zero, one of those potential differences must be the opposite sign of the other two. Which one is it? It seems to me that the inductor and resister slow down the charges while the capacitor could sort of speed them up (talking very loosely here, of course). So does it make sense to say V_C = V_R + V_L or is that incorrect? Also, does the addition of a sinusoidal voltage source affect the sign of anything (like the inductor, most likely)? I'm actually a little embarrassed to be asking this question as I am a senior physics major, but I haven't worked with circuits in a long time. The sign for voltage drops in a circuit seems like a very fundamental thing to know, but I haven't seen it clearly explained anywhere I have looked. Thanks.