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MSI Logic

  1. Apr 2, 2007 #1
    1. Hi i basically need information on how to construct a 4-to-16 line decoder made of four 2-to-4 line decoders each of the smaller decoders is equipped with two active-LOW enable inputs and i am allowed to use 2 inverters in addition to the four decoders.

    and also Show how to construct a 16-input multiplexer from four 4-input multiplexers,
    a 4-output demultiplexer and an OR gate. each of the smaller multiplexers
    is equipped with one (active-HIGH) enable, E. The 16-input MUX should have data
    inputs I15 −I0, select inputs S3S2S1S0 and output Z.



    I constructed a 4-16 decoder using five 2-4 decoders but thats not what i am after lol and not sure how to do this with four.

    Thanks for any help
     
    Last edited: Apr 2, 2007
  2. jcsd
  3. Apr 4, 2007 #2
    i figured out the first question can anyone help with the second. The thing is there is only like 5 pages on this topic in my book and its very frustrating.
     
  4. Apr 5, 2007 #3
    yay i figured it out (thanks for all the help :P) Glad to know this site doesnt care
     
  5. Aug 20, 2007 #4
    To gogon..

    hi gogon,
    how to construct a 4-to-16 line decoder made of four 2-to-4 line decoders
     
  6. Sep 5, 2007 #5
    Its not a matter of no one caring, its a matter of showing your work. Do realize that many HW helpers have FULL TIME JOBS and a FAMILY to worry about.

    You would be able to find this circuit in elementary digital logic design textbooks.
     
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