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N type semiconductor under voltage bias

  1. Dec 4, 2014 #1
    I plotted n type carrier density vs temperature plot at zero applied bias and the intrinsic carriers dominate the extrinsic carriers at high temperature, now I wonder how plot changes if I apply positive bias to this semiconductor. Does intrinsic carriers dominate the others at lower temperature?
  2. jcsd
  3. Dec 9, 2014 #2
    Thanks for the post! This is an automated courtesy bump. Sorry you aren't generating responses at the moment. Do you have any further information, come to any new conclusions or is it possible to reword the post?
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