Node voltage analysis help

  • Thread starter madchiller
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There is one thing i cant seem to figure out and it is the sign convention for circuits. On one side my textbook says that it is arbitrary and a neg sign in some cases means that we didnt chose the correct polarity and in some cases i feel like it is some kind of vodoo magic. I dont get how they chose the voltage drop of a resistance while applying node voltage analysis. I understand the node business. However, when it comes to find specific voltages of a resistance i dont get how you choose to +Vr ( resistance voltage) or -Vr. So please if somebody has a clear explanation on how to play this node voltage analysis please do so. I am sorry to seem stupid but i am trying to learn. TX for the help: )
 

berkeman

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When using the KCL to solve for node voltages, you choose current directions through parts, and keep using those same directions (and corresponding voltage polarities for the resulting voltage drops due to currents in those directions) throughout the solution. In the end, you may get a negative number for the voltage or current that you assumed was positive, but that doesn't matter. As long as you write all of the equations in your mesh analysis using the same polarities for each equation, the final answers will be correct.

http://en.wikipedia.org/wiki/Kirchhoff's_current_law#Kirchhoff.27s_Current_Law_.28KCL.29

Draw the polarities on the circuit before you write the equations, and stay with those polarities as you write all of the simultaneous mesh equations. You'll get the hang of it as you do more problems.
 

berkeman

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BTW, since this was a general question about the method of node voltage analysis, it's appropriate for here in the EE forum. If you end up with specific homework/coursework problem questions, remember to post those in the Homework Help section of the PF, and to show your work in progress, so that we can offer tutorial help.

Welcome to the PF!
 
BTW, since this was a general question about the method of node voltage analysis, it's appropriate for here in the EE forum. If you end up with specific homework/coursework problem questions, remember to post those in the Homework Help section of the PF, and to show your work in progress, so that we can offer tutorial help.

Welcome to the PF!
thanks a lot. But then who is right? if i get a negative voltage or current do i take the absolute value because the polarity that i chose was wrong?
tx for the help
 
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thanks a lot. But then who is right? if i get a negative voltage or current do i take the absolute value because the polarity that i chose was wrong?
tx for the help
No, you most certainly don't do that. What is means is that the actual current is going in the opposite direction.

The easiest way to do node voltage analysis is as follows:
1) label all of the node voltages in your circuit
2) pick a node (note, do not pick a nose)
3) write expressions for currents leaving the node in terms of node voltages (I=V/R)
4) write a node equation setting the sum of all currents leaving the node = 0
5) repeat 2)-4) for all other nodes
6) solve the system of equations for the node voltages

That's it. Just do that consistently and don't worry about the fact that some of the currents in 3) are actually coming into the node instead of leaving the node.

In 3), since the convention is to write expressions for current leaving the node then, if your circuit element is a resistor and if you are working at node i then you will always have an expression of the form (Vi-Vj)/R. If you solve the system and get Vj>Vi, all that means is that the current is actually entering the node instead of leaving it. Do not try to guess if Vj>Vi or not, always use the convention of currents leaving the node. This applies also when you get around to node j, when you are at node j you assume again that the current is leaving the node, i.e. at node j you write (Vj-Vi)/R. Your assumption of currents leaving will therefore always be wrong exactly 50% of the time, but as long as you are consistent you will get the right voltages.
 
crystal clear tx a lot for the help : )
 

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