The concept of output impedance is highly confusing to me. I will be thankful if some body gives simple explanations to the following. 1. I undertand that in the case of current amplifiers, the out put impedance should be low and the input one should be high. In the case of voltage amplifiers the opposite is true. If you take slope in the saturation region of the output characteristics of a transistor, the impedance will be very low and if you take it on the active region it will be enormously high. If you take it at a point close the knee point it will be intermediate. So it goes on varying. Then how can we judge the right value of output imp. and where it should be measured ? 2.This problem comes while we teach the higher secondary students in the practical class when they draw the graph for the same. 3. The text books demand that their output imp. should be lower than the input one. (in the case of NPN transistor in CE mode. 4. In this case I feel another contradiction. Because the theory part says that a transistor is operated in active region as only in that regions the collector current is independent of the coll-emit. voltage. But if you take impedance in that region the output imp. will be higher than the input one. If I get a detailed explanation it will be useful to me.