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Reducing EMC on CCA

  1. Oct 31, 2013 #1
    We have a design which has some radiated emissions exceeding are stated levels.

    We are trying to reduce our emissions profile.

    1) We have increased our series termination resistors to "soften" the clock edges
    2) I am looking at the various added inductors added to the power pours and planes.
    I have not found much information indicating these are helping to reduce our emission levels.
    I believe these inductors are making our emissions higher.
    3) We have low value caps on the outputs of our oscillators, these are used in conjunction with
    the series resistor as a low pass filter.

    Any other suggestions or comments are welcom
     
  2. jcsd
  3. Oct 31, 2013 #2

    berkeman

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    Welcome to the PF.

    We will need a lot more information to be of help. Can you say more and/or post pictures of your device? Have you read the standard EMC tutorial materials, including the classic book "Noise Reduction Techniques in Electronic Systems" by Ott?
     
  4. Oct 31, 2013 #3

    UltrafastPED

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    Is this on a breadboard or a PCB? Or is it a chip?

    If on a PCB you should separate the analog and digital ground planes.

    For specific types of systems you can find lots of discussion and advice. For example this is for PCBs:
    http://www.cypress.com/?docID=28761
     
  5. Oct 31, 2013 #4
    yes this is a PCB which has been built...Yes we have a ferrite bead on the digital and analog ground plane.
    I just do not believe adding ferrite beads on Digital power pours is helping us...
     
  6. Oct 31, 2013 #5

    berkeman

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    Please post much more information about your device. You are wasting our time with such general questions (sorry to be harsh).
     
  7. Oct 31, 2013 #6
    I do not intend to be overly vague... It should actually be a simple answer....I could take a snapshot of the schematic to show the inductors in series with the power pours... I have not located anything on the web to indicate the inductors reduce the high frequency noise.. I believe they are making the problem worse. I was always taught, the power pours should have very low impedance....
     
  8. Oct 31, 2013 #7

    berkeman

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    Excessive radiated emissions comes from common-mode RF currents that excite resonant antenna-like conducting structures in and around your product. It can be anything from poor "star grounding" to parasitic capacitive coupling of signals into parts of your metal enclosure or external metal.

    Sometimes ferrite beads help, and sometimes they don't. It all depends on the PCB layout, the circuitry involved, the frequencies involved, and what the final radiating structure is. Your question is still to vague for me. I will unsubscribe from this thread, and hopefully others will be willing to help you. I'm an EMC expert, BTW.
     
  9. Oct 31, 2013 #8

    UltrafastPED

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    How many layers? What frequencies? How are you detecting the EMC? Is this a school project or something else?

    You seem to think that adding inductors everywhere is the solution. This is only part of the solution, and may not be the solution for your situation.

    That is why I posted the particular reference in #3; there is an immense literature on this topic, magazines devoted to it. As with most problems you must examine the system as a whole, and work through all of the details. Here is a tutorial: http://www.learnemc.com/EMC-Tutorials.html [Broken]
     
    Last edited by a moderator: May 6, 2017
  10. Oct 31, 2013 #9
    Ok, let me add further details..
    We have 24MHz and 27MHz crystals in the design, they both have 33 ohm series resistors at the output.
    The crystals are as close to the IC as possible. Our product is audio and video based... We have RE violations
    up to the 7th harmonic of these base frequencies.. Our design uses a 6 layer board.. Our digital signals are coupled to an adjacent plane with ground copper plane and power plane... I am suggesting various things to reduce the emissions short of a new PWB design.. One possible reduction is to remove there small inductors added to the LDO and switcher outputs... I do not believe they are needed...

    Tom
     
  11. Oct 31, 2013 #10

    meBigGuy

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    Don't use inductors on the power lines. Use ferrite beads. As for inductors making things worse, it is hard to say. An inductor feeding a large enough capacitor (with small caps also) will keep high frequency currents out of the supply. The low impedance comes from the bypass capacitors.

    Are there cables involved besides the power cables, and what happens to emissions when they are disconnected?

    Are your violations at all related to the switcher? Does it have adequate snubbing?

    What sort of case is this in?

    How are the power grids layed out and bypassed (ground is more important)? Are there local 0.1uF bypasses at all IC's?

    Are the clock layed out as transmission lines? Always over a ground plane?

    Are there sufficient grounds in any cables?
     
  12. Nov 1, 2013 #11
    Berkeman is correct, this type of issue cannot be productively discussed without a certain minimum critical mass of information.

    If you indeed have separate analog and digital ground planes this would be what I would suspect first. If you have a way of bonding them together try that first.
     
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