# Relations between the currents and voltages for a black-box device with "k" terminals

## Summary:

About the relation between k-terminal device descriptive currents and voltages
Hi,

I'm aware it is an odd question. Consider a ##k##-terminal electrical device as black-box.
We know from KLC and KLV that just ##k-1## currents and ##k-1## voltages are actually independent (descriptive currents and voltages).

Furthermore we generally expect there exist ##k-1## relations between them (thus for example assigning ##k-1## currents basically fix the remaining ##k-1## voltages).

My doubt is: is that always true ? In other words: from a theretically point of view it could be that no relation exist between descriptive currents and voltages ?

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Baluncore
2019 Award
My doubt is: is that always true ?
Under what conditions and assumptions can it be true ?

DaveE
Gold Member
Furthermore we generally expect there exist ##k-1## relations between them (thus for example assigning ##k-1## currents basically fix the remaining ##k-1## voltages).
I'm not sure I understand this. Doesn't "black box" mean you don't know what's inside?

So suppose my black box is a 1-port (2 terminals) and it has only 1 resistor, how does knowing the current into a terminal tell you the voltage?

Under what conditions and assumptions can it be true ?
Mine is not a 'physical' question, it is really a question about mathematics applied to circuit theory. I was concerned about the possibility that one set of descriptive parameters (e.g. currents) is actually not able to uniquely determine the other set (e.g. voltages)

So suppose my black box is a 1-port (2 terminals) and it has only 1 resistor, how does knowing the current into a terminal tell you the voltage?
Maybe my question was not well stated....I hope the above help to explain it

DaveE
Gold Member
Mine is not a 'physical' question, it is really a question about mathematics applied to circuit theory. I was concerned about the possibility that one set of descriptive parameters (e.g. currents) is actually not able to uniquely determine the other set (e.g. voltages)

Maybe my question was not well stated....I hope the above help to explain it
Sorry, I still don't get it.

Baluncore
2019 Award
The scattering matrix has (k-1)² parameters.

Take a 2-terminals device (actually a one-port device) built with a Nullor inside. Attach for instance a resistor to the nullator inside and the norator at port terminals

We'll get a device for which if we assign (from outside) the port current then port voltage remains indeterminate (same story if you assign the port voltage).

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I would use this thread for a similar question.

Consider the following picture about the series interconnection of two-port networks with common ground.

Why we can still use the two-port ##\left [ \mathsf Z_a \right] ## and ##\left [ \mathsf Z_b \right] ## parameters to get the overall ##\left [ \mathsf Z \right] ## two-port representation ? For a general two-port network series interconnection that is not true....we have to check for the port conditions for each of the member networks.

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DaveE
Gold Member
I would use this thread for a similar question.

Consider the following picture about the series interconnection of two-port networks with common ground.
View attachment 270129

Why we can still use the two-port ##\left [ \mathsf Z_a \right] ## and ##\left [ \mathsf Z_b \right] ## parameters to get the overall ##\left [ \mathsf Z \right] ## two-port representation ? For a general two-port network series interconnection that is not true....we have to check for the port conditions for each of the member networks.
It seems pretty simple to just show this for each element of [Z], like I did below for Z11. Or perhaps I misunderstood your question?

edit: oops, I just noticed that you inverted the bottom network. So there will be sign errors (or disagreements with yours).

This seems like a good treatment, they do this problem:
Thanks for the reference...nevertheless it seems to not catch my point (see following)

The point is that we are tacitly assuming (as in the picture) that port current constraint holds for each member network ports (so for instance for the member network A the current entering/leaving port 1 terminals are equals and the same holds for current entering/leaving port 2 terminals)

DaveE
Gold Member
Thanks for the reference...nevertheless it seems to not catch my point (see following)

The point is that we are tacitly assuming (as in the picture) that port current constraint holds for each member network ports (so for instance for the member network A the current entering/leaving port 1 terminals are equals and the same holds for current entering/leaving port 2 terminals)
So you're concerned that even though I2=0, that doesn't imply that I2a=0?

But all of those ground terminals are the same circuit node. There is nothing to constrain how you divide up the currents that flow from ground to ground. I think you are free to assign them however you like to make the math easier.

DaveE
Gold Member
or, consider redrawing the problem with the four ground terminals connected on the outside of the networks. I think it's the same thing.

So you're concerned that even though I2=0, that doesn't imply that I2a=0?
Exactly, where I2a is really the current leaving network A port 2 bottom terminal.

or, consider redrawing the problem with the four ground terminals connected on the outside of the networks. I think it's the same thing.
Is the following the correct drawing for what you are saying ?

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eq1
The point is that we are tacitly assuming (as in the picture) that port current constraint holds for each member network ports (so for instance for the member network A the current entering/leaving port 1 terminals are equals and the same holds for current entering/leaving port 2 terminals)
Isn't that just KCL restated, which you took as a theorem in #1?

I think the image in #15 might not be correct. I am pretty sure the variable in the lower left should be I1 and not I2. Otherwise KCL at the network would be I1+I2-I2-I2=0, which will not hold for many circuits.

DaveE
Gold Member
Exactly, where I2a is really the current leaving network A port 2 bottom terminal.

Is the following the correct drawing for what you are saying ?

View attachment 270172
yes, or something like below.

But I think you're missing a more general point here. These Z-parameters will work for all linear 2-ports, whatever the components are inside. That includes 0 ohm resistors. The network with a common ground is a specific version of the more general case.

eq1
That includes 0 ohm resistors.
Or an empty box. :)

These Z-parameters will work for all linear 2-ports, whatever the components are inside. That includes 0 ohm resistors. The network with a common ground is a specific version of the more general case.
I believe it is not actually true for the series interconnection of general networks (no common ground).
Googoling I found this interesting argument from the book Linear circuit analysis - Decarlo

In the above example the series interconnection no longer comply with the port current constraints for each of the component networks.

I believe the interconnection of common ground networks is actually a special case. For the final network the currents through the '0 ohm resistors' branches building the 'large' common node are actually indeterminate, thus -- as you said before -- we can chose them in order to meet the port current constrains for each port of the member networks.

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DaveE
Gold Member
I believe it is not actually true for the series interconnection of general networks (no common ground).
Googoling I found this interesting argument from the book Linear circuit analysis - Decarlo

View attachment 270223

View attachment 270224

View attachment 270225
In the above example the series interconnection no longer comply with the port current constraints for each of the component networks.

I believe the interconnection of common ground networks is actually a special case. For the final network the currents through the '0 ohm resistors' branches building the 'large' common node are actually indeterminate, thus -- as you said before -- we can chose them in order to meet the port current constrains for each port of the member networks.
Yes. I think you are correct. That example is clear.

The following is a similar schema with just one network 'block' involved. To use its two-port representation in the overall circuit, I believe the depicted arrangement has to be done (at least formally).

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