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Engineering
Electrical Engineering
Understanding Shannon's Limit on 64QAM: A Simple Explanation
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[QUOTE="zmoose, post: 3610627, member: 371069"] I have a simple qusetion regarding how to interpret Shannon's limit. I am looking at this for fun and am not a system/theoretical engineer so please excuse my errors as I'm sure there a lot. I believe Shannon's limit can be written as: Capacity =log2(1+Br/Wn * Eb/No) where Br is the bit rate and Wn is the noise bandwidth.A 64QAM system has a theoretical capacity of 6bit/hz. Assuming the noise bandwidth is the same as the channel bandwidth, then Br/Wn=6 (6bits per symbol). The required Eb/No is therefore about 10. I believe this is the accepted answer. My question is if I look at the equation, it seems to me that one can increae the bit rate Br by over sampling and increase Br/Wn, thereby reducing the required Eb/No. This makes sense as over sampling and averaging is a common technique to to increase S/N. If this is true, then the equation says that if one over sample fast enough (make Br really large), one can bring Eb/No down to 1. I know this is wrong. Real 64QAM systems need a lot of Eb/No. So what did I miss in my interpertation of the equation. Thanks for the help [/QUOTE]
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Understanding Shannon's Limit on 64QAM: A Simple Explanation
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