Simple Oscillator (non ideal)

  1. So I want to start off saying that I'm a senior in college in Electrical Engineering and I've been learning a lot about various kinds of circuits involving oscillators and I would like to know more about them. In school we talk a lot about them in various circuits and how important they are to those circuits but we haven't really learned anywhere how a simple oscillator works outside of ideal conditions for an LC circuit.

    But since those don't exist in real life you have to be clever and invent a way to make something oscillate. And from my research most of the oscillators today use transistors in various combinations with capacitors and resistors (OpAmps, 555 timer, etc). I have an old radioshack lab book that works you through various electronic "projects" to help you understand circuits and I remembered it had an oscillator example, so I decided to open it up and try it out, and maybe that would help me understand it better. Even after reading the authors note and drawing up a circuit diagram myself, and changing the layout of the circuit so maybe I could understand it better, I'm still confused about how its oscillating.

    If someone could explain it to me in detail step by step how its oscillating I would be greatly appreciative as this is something that has been bothering me for some time now. I want to have a fundamental grasp of how a basic oscillator would work. So I figured I would present my question to the awesome guys here at PF who explain things so well. I attached the picture of the circuit with the authors explanation of whats happening.

    What bothers me is how the capacitor and the PNP transistor operates in this circuit. The capacitor is constantly being charged, so how could it discharge through Q1? Wouldnt it just discharge while charging? So nothing would happen and that whole part of the circuit would just stay an open circuit after the capacitor has charged fully.

    Also the PNP transistor....I must not have a good grasp of how PNP transistors work because I would think the PNP transistor would always be on (current flowing from emitter to collector) and then when current is applied to the base it would turn off. Although I know from my electronics class you don't necessarily have to apply current through collector-emmitter so it does depend on how the configuration is setup. In this circuit they claim that once the NPN "turns on" when the base has current flown through it then current flows through emitter-collector of the PNP. That to me suggests current is flowing from NPN through base-collector through to the base-collector of the PNP. But then wouldnt that mean the NPN is off?

    Any help in understanding this would be greatly appreciated. Thanks in advance PF guys!

    Attached Files:

  2. jcsd
  3. I don't understand why Q1 ever turns off once it is turned on.

    When Q2 turns on there is a huge surge through the base of Q1 as the cap is clamped to 0.7V by the Q1 BE junction. C1 may then try to discharge through Q1 BE, but the current through the resistor (that was enough to turn it on initially), would keep it turned on.

    If Q2 ever did turn off there would be a -4.5 volt transition at the base of Q1.
  4. @meBigGuy

    From my understanding, right when the circuit is turned on, the capacitor is charging through the current from the sum of the resistances in series with the voltage source. Applying KCL at the node (in the attached diagram) you can see the current divides between the cap and the base of Q1. Right when the circuit is switched on, there is max current at I2 (in my diagram) but it decreases as the cap gets charged, and when the capacitor is fully charged it should become an open circuit and now I3 = I1.

    At a certain point in the charge level through the capacitor the current to the base will reach a certain level and turn on Q1 because the current reaches a certain threshold in the transistor and "turns it on". So in theory if the capacitor discharges somehow the current through the base would decrease as the current gets split again through the capacitor and the base of Q1 which would lower the threshold level of the current and "turn it off".

    What I dont understand is how that capacitor would discharge once its fully charged, since a voltage source it constantly being applied to it. Is the discharge rate faster than the charge rate of the capacitor or something? (which would be due to the RC circuit set up).

    Attached Files:

    Last edited: Sep 29, 2013
  5. I think I see how it works. When the transistors start to turn on C1 gets an extra 'kick' from the collector of Q2. I suspect that without this extra 'kick' there is probably not enough base current in Q1 to turn it on hard enough to latch up like it appears that it would. There is no doubt that there is positive feedback, that is for sure. So after C1 has been charged up by the positive feedback the base current in Q1 starts to sag again. As I said before, there is not enough base current to turn the transistors on hard without aid from C1. So, when the base current sags, the collector of Q2 drops which in turn reduces base current in Q1 even farther. Cycle starts over. A pretty clever circuit, but I am sure not very repeatable from one transistor to the next as it looks heavily beta dependent. Hence the pot.
  6. That's the same problem I have. If the resistors supply enough current to charge to startup, what causes it to discharge below that point? It *may* somehow oscillate around the linear bias point that you would get if you shorted the capacitor. But, it would be a frequency related to the delay through the two transistors.

    It has other problems as well. For example, when Q1 is off, Q2 leakage would want to keep Q2 turned on.

    If you turned Q2 into an NPN darlington (with a pullup on its base) then it would be more like what I would expect.
  7. AlephZero

    AlephZero 7,248
    Science Advisor
    Homework Helper

    Correct, but you forgot the other half of that story.

    When Q2 turns on, there is a +4.5V jump at the base of Q1, (well, actually a bit less than that) because of the voltage across the speaker.

    That reduces the voltage across R1 and R2, so the "charging current" for C1 is less than the "discharging current" through the base of Q1. More current is flowing out of C1 than is flowing in, and it discharges.

    This circuit (with a fixed resiistor instead of R1 and R2, and a light bulb instead of the speaker) used to be used in the "flashing yellow lights" used on road works at night to warn of lane closures etc. The oscillation frequency was usually about 1 Hz.

    A computer simulation will show what happens. You need an oscilloscope to investigate the real circuit - a DMM won't show you what happens during the short "on" pulse.
  8. The voltage at Q1 base can never go above 0.7 volts because of Q1 Vbe. But, then what will ever cause it to go below 0.7 if the resistors were enough to get it to 0.7 initially.
  9. The resistors are enough to get some kind of action on the output which is enough to make the feedback work. I never said that they have to be large enough to turn the transistors on hard. Base voltage does not need to get to .7. It needs to get close enough to get some kind of action on the output. It's a simple enough circuit, I say build it.
    I can't see how Q2 would turn on through any kind of leakage. The speaker is a pretty good load and will keep the collector voltage pretty close to 0 when Q2 is off.
  10. Generally one builds an oscillator around an inverter, not a buffer. It may oscillate, not not in the "popping" way described in the writeup.
  11. An oscillator ALWAYS relies on positive feedback. This an inverter is NOT.
  12. Frequency dependent positive feedback. Lookup inverter based oscillator on google images.
  13. The signal always appears as positive feedback on the input through delay. Hence the frequency dependent part. It is ALWAYS a net positive feedback if it is to oscillate. Certainly not saying you can't build an oscillator around an inverter, but in one form or another the feedback ends up positive.
  14. I understand how oscillators work, but this circuit will not produce the discrete popping sound the designer describes.
  15. Build it, my guess is that it will. It hasn't said the rate of pops. I would guess it cannot get slow enough to be accurately described that way, more like a slow buzz. I have looked at a lot of circuits and said that they cannot work and have been surprised many times. I'm betting on it working. It is no great shame to question if an oscillator can run by looking at the schematic. Typically most oscillators look to me like they can't run. LOL
    Last edited: Sep 29, 2013
  16. @meBigGuy and Averagesupernova

    Yeah it sounds like a buzz with a 0.01u Cap, if you use a 10uF cap you can really slow it down and make it go to 1Hz (it does sound like pop). And thanks everyone for the posts, this is helping me think about this more!
  17. I sure would like to see the waveforms at the base and on C1 rightside.
  18. I'll check this again in the morning. Off to bed. Interesting discussion. Have to admit when I first looked at it I questioned how it could possibly work. But if it is written by Forest Mimms, I have faith. LOL So I looked again and thought about it more. I think it would work, but probably not very beta stable or temperature stable.
  19. @meBigGuy

    You said earlier "If Q2 ever did turn off there would be a -4.5 volt transition at the base of Q1.". Could you explain why that would be the case? I noticed you guys talking a lot about feedback, but I dont see how that applies here. Could someone explain?

    Edit: Ohhhhh is it because of the capacitor discharging?
    Last edited: Sep 29, 2013
  20. Which direction is the base current in the PNP going? I'm still confused on that. Also, does the base current in Q1 sag because of the discharge versus charging rate? Man, I think I'm confusing myself way too much here.
  21. Roughly speaking, when there is a voltage change on one side of a capacitor, the same change appears on the other side. Just before the output switches off the Q2 side of the capacitor is at 4.5V (assuming large signal multivibrator action, which may not be what is actually happening). When Q2 switches off, that causes a transition to 0 volts, which is a -4.5V change. On the other side, the base of Q1 was in the region of 0.7V so it would transition by -4.5V to -3.8V.

    But, again, all that was predicated on the voltage at the Q2 - C1 junction making 4.5v swings. What does it actually do?
Know someone interested in this topic? Share this thead via email, Google+, Twitter, or Facebook

Have something to add?

Draft saved Draft deleted