应用笔记 1166
Flyback Transformer Design for MAX1856 SLIC Power Supplies
摘要 : The subscriber line interface circuit (SLIC) provides DC power, ringing and supervision functions for the \"plain old telephone service\" (POTS) where alerting a telephone is a prerequisite but a central ringer is generally not available. SLICs have also been used in Terminal Adapters (TA), Voice over Internet Protocol (VoIP) and Network Termination (NT) applications. This application note provides a detailed design procedure for the flyback transformer that can be used with MAX1856 in SLIC power supplies.
The MAX1856 offers a low cost solution for generating subscriber line interface circuits (SLIC) power supplies. The SLIC provides DC power, ringing and supervision functions for the "plain old telephone service" (POTS) where alerting a telephone is a prerequisite but a central ringer is generally not available. SLICs which incorporate the ringer function, have been used in Terminal Adapters (TA), Voice over Internet Protocol (VoIP) and Network Termination (NT) applications. This document presents a sampling of power supply reference designs for use with typical SLICs in two- channel and four-channel POTS loops. Each application has specialized requirements depending on the number of channels serviced and loop length. The requirements for three typical applications are presented in Table 1.
Table 1. Reference Solution Requirement Guide
A flyback topology is used to develop the required negative voltages. At power levels below 75 to 100 watts, the flyback topology results in minimum component count and lowest cost as compared to other topologies. Figure 1 shows a typical application circuit using the MAX1856 to generate the ringer and talk battery voltages.
Figure 1. Dual negative output power supply.
Two of the most important factors in the design of a flyback power supply are the controller and the transformer design. These reference designs use transformers, which were specifically designed for these applications. Familiarity with flyback transformer design is necessary in order to choose the correct transformer for a given application. This application note discusses details of flyback transformer design for MAX1856 controller-based circuits. Familiarity with basic flyback converter operation is assumed. The important functional blocks of the MAX1856 are first discussed. The requirements in Table 1 are then considered in conjunction with the MAX1856 to determine the transformer parameters. Three reference application circuits serve as examples to demonstrate the design techniques. Presenting the efficiency and cross-regulation data for these three circuits, in conclusion, complements the article.
(1) Reverse recovery current in the rectifier diodes when the flyback operates in continuous conduction mode (CCM). If the MOSFET turns on during the reverse recovery, the diode acts as a short and a large current spike flows in the MOSFET. This spike is reflected in the current sense signal. Using an ultra-fast rectifier reduces the magnitude of this current. Higher leakage inductance in the transformer also reduces the magnitude of this spike. However, increasing the transformer leakage inductance is not a viable option since that will lead to large voltage spikes across the rectifier diode and across the MOSFET during turn-off. In addition, the secondary leakage inductance of the transformer forms a resonant circuit with the parasitic capacitance of the rectifier diode. This ringing is also reflected in the current sense waveform (R5 and C10 in Figure 1 form a snubber to critically damp this ringing).
(2) The total capacitance on the MOSFET drain side includes the MOSFET drain-source capacitance (C_{ds}), parasitic transformer winding capacitance, junction capacitance of the snubber diode (C_{j}) and any other trace capacitance on board. At turn-on, the total equivalent capacitance discharges through the MOSFET and current sense resistor.
(3) The MOSFET gate operating current also flows through the current sense resistor.
The MAX1856 deals with this leading edge noise by using blanking. Since the problem noise arises immediately after turn on, the MAX1856 ignores the current sense line for 100ns after turn on. As shown in Figure 1 an additional external low pass filter (R2, C7) may be used. The RC time constant of this filter should not be too large as that may distort the current sense signal. Typical values recommended are 100Ω for R2 and 1000pF for C7 (see the MAX1856 data sheet).
A flyback transformer is actually a coupled inductor. Unlike a true transformer, its main purpose is to store energy, not simply transfer it. Ideal magnetic materials cannot store energy. In practice, the small amount of energy stored in magnetic materials ends up as loss. In order to store and return energy to the circuit efficiently and with minimum physical size, a small non-magnetic gap (typically air gap) is required in series with a high permeability magnetic core material. Virtually, all of the energy is stored in the so-called non-magnetic gap(s). The core provides an easy, low reluctance flux path to link the energy stored in the gap to the winding. The core, in essence, efficiently couples the energy storage location to the external circuit. This function is accompanied by core losses due to flux swings and core saturation where the core becomes non-magnetic above a certain flux density level.
According to Faraday's law, the amount of flux swing is given by dividing the flux rate of change (Volts/turn) by the core cross-section area and multiplying by the switch ON time. The amount of air gap introduced has no effect on the amount of flux swing B_{ac}. The air gap changes the slope (reduces slope - see Figure 2) of the B-H curve so that the gapped core can support a much larger value of H without saturation. A DC current component in the windings gives rise to a DC magnetizing force H_{DC} on the H-axis of the B-H loop. This DC component in turn results in a mean flux density B_{dc}. Therefore, for the gapped core, a much larger DC current is required to produce the same mean flux density as the non-gapped core.
Figure 2. Magnetization loops for a ferrite transformer with and without an air gap. Notice the increased transferred energy DeltaH when a large air gap is used.
The improved tolerance to DC current becomes particularly important in the continuous mode operation since the current in the core never falls to zero. In continuous mode, the ripple current is small enough that AC loss (in the core) is not significant, but in discontinuous mode AC losses may dominate. Sufficient turns and core area are provided to support the applied pulse conditions, and sufficient air gap is provided in the core to prevent saturation and support the DC components.
W_{a}A_{c} = [P_{O}/(KΔBf_{sw})]^{4/3}
Where P_{O} = Output Power (W)
ΔB = Flux Density swing (Tesla)
f_{sw} = switching frequency
K = winding factor
There are many variables involved in estimating the appropriate core size. Core power handling capability does not scale linearly with area product or with core volume. A larger transformer must operate at a lower power density because the surface area dissipating heat does not increase in proportion to the volume producing the heat. Most manufacturer's no longer provide area-product information but use their own methodology to estimate power handling capability for a given core size.
The shape of the core is not a significant consideration for continuous mode operation due to low AC losses. For discontinuous mode operation, the winding area window is chosen as wide as possible to minimize AC winding losses. EC, ETD, EFD, LP cores are all E-E core shapes with large wide windows. Applications requiring low profile can benefit from using EFD cores. A table of suitable ferrite core types (Table 2) for various power levels is given for applications with the MAX1856 controller (frequency range 100kHz to 500kHz).
Table 2. Ferrite Core Selection for Transformer Construction
The specifications in Table 1 indicate that Application 1 (four service lines) needs 23W of output power while the other two applications (dual line) need output power of 11W. An EFD20 core is selected for the quad line application and an EFD17 core is selected for the 12Vin dual line application. The 5Vin dual line application uses an EFD15 core.
Some control loop comments on continuous mode are in order here. Traditionally, the continuous mode loop analysis is considered more difficult due to the existence of a right half plane (RHP) zero and a complex pole pair that shift with duty cycle. However, the MAX1856 uses internal compensation and provides adequate phase margin over the line and load combinations considered. This makes the stabilization of the MAX1856 for continuous mode operation a simple matter.
Given the pros and cons discussed and the output power requirements in Table 1, choose the continuous mode of operation.
Equation 1 below describes the relation between turns ratio and duty cycle for a given output and input voltage specification.
|(V_{OUTx} + V_{D})|/V_{IN} = (N)[D/(1-D)] ------------eq.(1)
Where
V_{OUTx} = Output Voltage at output 'x',
V_{D} = Forward Voltage drop across the secondary rectifier
N = turns ratio (ratio of secondary turns (N_{S}) to primary turns (N_{P}))
D = MOSFET duty cycle
Therefore,
|(V_{OUTx} + V_{D})|/V_{IN, MIN} = (N)[D_{MAX}/(1-D_{MAX})] ------------eq.(1a)
and
|(V_{OUTx} + V_{D})|/V_{IN, MAX} = (N)[D_{MIN}/(1-D_{MIN})] ------------eq.(1b)
Referring to Table 1 again, for the quad and dual line applications with 12V input voltage specification choose a turns ratio of
V_{BAT2}/V_{IN} = 2 and V_{BAT1}/V_{IN} = 6.67
This results in a 49% duty cycle at nominal input voltage.
However, for application 3 in Table 1 (dual line from 5V input) this strategy results in a turns ratio of 16 for V_{BAT1}. As discussed earlier, this is impractical. Therefore, choose a maximum turns ratio of 8 (for V_{BAT1}). Assuming a 1V drop across the two rectifier diodes and substituting in eq.(1) we have a duty cycle of 67% at the nominal input voltage. Using eq.(1) again, we then have a turns ratio of 2.5 for the talk battery output (V_{BAT2}).
The required output voltage for the talk battery is -24V and for the ringer is -80V. Assuming a drop of 1V and 1.25V across the secondary rectifiers, the voltage at the secondary of the transformer is -25V and -81.25V respectively.
For the first application (quad line), using the volt-seconds approach, the number of turns in the secondary is
N_{S1} = (25/1.25) × [D_{MIN}/(1-D_{MIN})] = 18.46 ≈ 18
N_{S2} = (81.25/1.25) × [D_{MIN}/(1-D_{MIN})] = 59.98 ≈ 60
Using a similar approach for application 2 (dual line 12V input) we get
N_{S1} = 25 × [D_{MIN}/(1-D_{MIN})] = 23.07
N_{S2} = 81.25 × [D_{MIN}/(1-D_{MIN})] = 74.76
Note that the turns ratio obtained using the volt-seconds equation results in approximately the same value as that desired by the voltage ratio between the output and input (see "Turns Ratio and Duty Cycle Considerations" gives secondary turns of 22 and 73 respectively).
For application 3, the turns ratio does not equal the ratio of output voltage to input voltage. Use the turns ratio chosen earlier to calculate the secondary turns. This gives 12.5 turns for the -24Voutput and 40 turns for the -80V output. Half turns are avoided if possible. Therefore change the number of primary turns to 6 for application 3. This results in 15 turns for the -24V output and 48 turns for the -80V output in the dual line 5V input application.
The average input current is given by
I_{P,avg} = [P_{O}/(η × V_{IN, min})] -----------eq.(2)
Where
V_{IN, min} = Minimum Input Voltage
η = Efficiency
P_{O} = Total output power required
The peak input current is, therefore
I_{P,pk} = 2 × I_{P,avg}/[(2-K_{R}) × D_{MAX}] -----------eq.(3)
Where
D_{MAX} = Maximum Duty Cycle
K_{R} = Ratio of ripple current to peak current
This gives the ripple current as
ΔI_{P} = 2 × [I_{P,pk} - (I_{P,avg}/D_{MAX})] ------------eq.(4)
We can now calculate the primary inductance as
L_{P} = [(V_{IN, min }× D_{MAX})/ (ΔI_{P} × f_{sw})] -----------eq.(5)
The gap dimensions determine the inductance per turn achievable for a given core. The manufacturer for pre-gapped ferrite cores or for distributed-gap metal cores often states the inductance factor A_{L} expressed in nano-Henry per square turns. Eq.(6) below provides a convenient method for calculating inductance for an existing gapped core for a given number of turns.
A_{L} = L_{P}/N_{P}² -------------eq.(6)
A LIR ratio of 0.4 has been found in practice to be a good choice giving good core utilization and reasonable overall efficiency. Choose this as the starting point to calculate the currents in the primary.
Using eq.(1) through eq.(5) and assuming efficiency of 70% for quad line application, gives I_{P,avg}/D_{MAX} = 5.74, ΔI_{P} = 2.3A, I_{P,pk} = 6.89A, primary inductance L_{P} = 4.98µH nominal and sense resistor R1 = 14.5mΩ. The designed transformer has primary inductance L_{P} = 4µH (±20% tolerance) and so R1 = 13mΩ.
Assuming an efficiency of 80% for the lower output power of application 2 (dual line) and using a similar methodology results in L_{P} = 18µH and use R1 = 34.7mΩ. Based on actual transformer parameters measured, the inductance L_{P} = 16.7µH and so use R1 = 33mΩ.
For application 3 we get I_{P,avg}/D_{MAX} = 4.43 andΔI_{P} = 1.48A. Using eq.(4) and eq.(5) the primary peak current I_{P,pk} is 5.17A and inductance L_{P} is 4.2µH nominal. The sense resistor R1 should be (100mV/5.17A) =19.3mΩ.
Lower values of inductance will result in larger ripple current while larger values of inductance will result in smaller ripple current. From a systems standpoint, small inductor ripple currents are desirable due to reduced output capacitor requirements and continuous current operation with light loads. However, because of the shallow slope presented to the current sense circuit, it can lead to pulse-width jitter caused by random or synchronous noise. Adding slope compensation will result in more stable operation especially for duty cycles greater than 50% (as is the case in application 3). As mentioned earlier (see "The MAX1856 Current Mode Controller—Slope Compensation in The MAX1856") a fixed amount of slope compensation is internally added in the MAX1856 depending on the duty cycle and switching frequency. In a peak current detecting mode, the average current can vary with duty cycle and input voltage. Adding slope compensation equal to half the current down-slope forces the average inductor current to follow the error voltage resulting in ideal current mode control. Adding a much larger slope compensation ramp causes the controller to behave less like an ideal current mode controller and more like a voltage mode controller. To choose an inductor value such that the slope compensation is 0.5 times the secondary current down slope use (use any secondary output)
L_{P} = [(0.9 × D_{MAX})/ (42mV × f_{sw})] × (V_{OUTx} + V_{D}) × (1/N) × R1 × 0.5 ------eq.(7)
For the example of application 3 this suggests a value of 2.85µH at nominal switching frequency and R1 = 19mΩ. The duty cycle in application 3 is much larger than 50% and the right amount of slope compensation will stabilize the waveforms. Select a value estimated by eq.(7). The transformer used has a primary inductance for the transformer of 2µH. Choose R1 = 12mΩ.
Table 3. Transformer Wire Table
The rms value of the transformer primary current I_{Prms} is given by (see Figure 3)
I_{Prms} = {D[I_{Ppk} × I_{Pm} + (1/3) (I_{Ppk} - I_{Pm})²]}^{0.5}
Figure 3. Continuous mode primary current waveform.
The CMA_{P} calculated should be in the 200 to 500 range. Above 500 the wire is underused in terms of capacity. Current crowding occurs near the surface, especially at high frequencies (i.e., "skin effect"), and reduces the effective current carrying area in the wire. Use multi-filar windings to achieve the same CMA_{P}. Do not simply bundle the wires or twist them together. Parallel conductors within one winding and rotate them together all through while winding. Iteration may be required to optimize the wire size and the number of strands in the winding. Below 200 the current density is too high. This may be overcome by using a larger core size or by using multiple layers in series.
Extreme caution should be exercised in using multiple layers. If the conductor is thicker than the skin depth, the AC resistance of the wire increases as compared to its DC resistance and the I²R loss increases exponentially with number of layers. The conductor thickness should be small enough for the field to penetrate completely through the conductor so that any opposing currents at the surfaces of the inner layers cancel. A split winding technique can be used for the primary where the first layer of the primary is the innermost layer and the second layer is wound as the outermost layer after the secondary are wound. This reduces leakage inductance but needs a spare pin on the bobbin to allow for termination of the center point.
Now calculate the wire size for the secondary windings. For multiple output supplies the peak secondary current calculated should match the power output on that winding. This ensures that the secondary wire gauge is never oversized. The secondary current waveform is similar to the primary current waveform except the current slope is negative. To calculate the peak secondary current use
I_{Spkx} = (I_{Ppk}/N_{Sx}) × (ΣP_{Ox}/P_{O}) and I_{Smx} = (I_{Pm}/N_{Sx}) × (ΣP_{Ox}/P_{O})
Where P_{Ox} is output power for the winding being calculated and P_{O} is the total output power. The rms secondary current is given by
I_{Srmsx} = {D[I_{Spkx} × I_{Smx} + (1/3) (I_{Spkx} - I_{Smx})²]}^{0.5}
The above assumes separate windings for each output. High AC losses can occur in windings that are carrying little or no current if they are located in the region of high AC magnetic field intensity between primary and secondary. Situations of this nature include lightly loaded or unloaded secondary in multiple output supplies. In the SLIC applications discussed here this is a very probable situation, where the ringer supply is fully loaded and there is no load on the talk battery supply, or vice versa. Use stacked windings to reduce these passive winding losses (Figure 4). S2 has to carry its own current, but S1 has to carry the current of S1 and S2 combined. To account for this the secondary current calculation now becomes
I_{Spkx} = (I_{Ppk}/N_{Sx}) × (ΣP_{Ox}/P_{O}) and I_{Smx} = (I_{Pm}/N_{Sx}) × (ΣP_{Ox}/P_{O})
Where ΣP_{Ox} is the total power for the winding (stays the same for S2 but is different for S1). The rms secondary current equation is the same. Match the current capacity for the primary and the secondary and calculate the secondary wire size as CMS = CMA_{P} × I_{Srmsx}.
Figure 4. Stacked windings for transformer secondary.
With multiple secondaries, windings should be sequenced so the highest power secondary winding is closest to the primary. For the dual output supplies discussed here, the interleaved winding sequence of P-S2-S1-P (P refers to primary and S refers to secondary winding respectively), starting from the innermost to the outermost winding, results in the best coupling between the two secondary and between the primary and each of the secondary. The multiple primary layers can also be paralleled in this case. The field divides equally between the two winding portions in order to minimize the stored energy and also result in minimum I²R losses. Paralleling succeeds when equal division of current among the parallel paths results in the least stored energy.
The wire sizes for the three transformers (for the three applications) are calculated using the procedure discussed above. Since this is an iterative process the final results are presented in Table 4. The previously calculated primary inductance values, number of turns, etc. are also presented in the same table to present a complete picture of the final transformer design. The bobbins used for these transformers each have 12 pins. Also refer to Figure 4 in conjunction with Table 4 for a complete understanding of the transformer construction.
The order of winding as mentioned earlier is (from innermost to outermost layer) viz.; primary, secondary (S2), secondary (S1) and primary. This gives the minimum leakage inductance and the best cross-regulation. A stacked winding construction is used where S1 and S2 combined (from pin 4 to pin 7) yield the V_{BAT1} output voltage of -80V for the ringer and S1 alone (pin 6 to 7) yields the talk battery V_{BAT2} output of -24V. Note referring to Figure 4 that the secondary winding S2 consists of two layers (pins 4-9 and pins 5-8). This is done to reflect the construction of the actual DT Magnetic transformers used in these applications. The transformers therefore allow for the possibility of tapping a different output voltage (-48V) for the ringer while still using the same transformer. Pins 1, 2 to 12, 11 form the primary winding. The table also mentions the corresponding DT Magnetic transformer part number that is actually used in these applications.
Table 4. Parameters for Transformers Designed for SLIC Applications
Table 5. Efficiency Data for the Three Application Circuits
Table 6. Cross Regulation Data at Nominal Input Voltage
Table 1. Reference Solution Requirement Guide
Parameter | Application 1 | Application 2 | Application 3 |
Input Voltage | 12V±10% | 12V±10% | 5V±10% |
Telephone Lines Serviced | 4 | 2 | 2 |
Ring Battery Voltage V_{BAT1} | -80V | -80V | -80V |
Ring Battery Voltage Regulation | ±6.25% | ±6.25% | ±6.25% |
Talk Battery Voltage V_{BAT2} | -24V | -24V | -24V |
Talk Battery Voltage Regulation | ±10% | ±10% | ±10% |
Ring Battery DC Load Current | 25mA | 120mA | 120mA |
Talk Battery DC Load Current | 120mA | 60mA | 60mA |
A flyback topology is used to develop the required negative voltages. At power levels below 75 to 100 watts, the flyback topology results in minimum component count and lowest cost as compared to other topologies. Figure 1 shows a typical application circuit using the MAX1856 to generate the ringer and talk battery voltages.
Figure 1. Dual negative output power supply.
Two of the most important factors in the design of a flyback power supply are the controller and the transformer design. These reference designs use transformers, which were specifically designed for these applications. Familiarity with flyback transformer design is necessary in order to choose the correct transformer for a given application. This application note discusses details of flyback transformer design for MAX1856 controller-based circuits. Familiarity with basic flyback converter operation is assumed. The important functional blocks of the MAX1856 are first discussed. The requirements in Table 1 are then considered in conjunction with the MAX1856 to determine the transformer parameters. Three reference application circuits serve as examples to demonstrate the design techniques. Presenting the efficiency and cross-regulation data for these three circuits, in conclusion, complements the article.
The MAX1856 Current Mode Controller
The MAX1856 is a PWM peak current mode controller. The MAX1856 uses a direct summing configuration to process the output error signal, the current sense signal and a slope compensation ramp. The current sensing block and the slope compensation technique have a direct bearing on the application circuit and are discussed in greater detail in the following sections.Slope Compensation in The MAX1856
For slope compensation, the MAX1856 adds a fixed ramp generated by the oscillator to the current ramp. The slope compensation is therefore a function of both frequency and duty cycle. The current ramp signal is derived from the external switch current by sensing the voltage across the sense resistor (R1 in Figure 1) placed in series with the source of the external MOSFET. Stability requirements dictate that the added slope be at least equal to half the secondary current slope in magnitude. Increasing the added slope beyond the magnitude of the secondary current slope does little to further improve stability. The amount of added slope is fixed internally for a given duty cycle and frequency. The MAX1856 internal slope compensation circuit adds a linear ramp that increases from 8mV to 50mV over 90% of the switching time period for any given frequency. The offset of 8mV allows the MAX1856 controller to go to minimum duty cycle in the presence of light loads. The slope compensation influences the choice of the primary inductance of the flyback transformer. This will be discussed in greater detail in the section on "Transformer Design-Primary Inductance L_{P} ".The MAX1856 Current Sensing with Blanking
The MAX1856 senses the external switch current using a sense resistor R1 (Figure 1). Once the current across R1 exceeds 85mV the PWM ON time terminates. A leading edge spike is present on the current sense waveform when the external switch turns on. It arises from the following three causes:(1) Reverse recovery current in the rectifier diodes when the flyback operates in continuous conduction mode (CCM). If the MOSFET turns on during the reverse recovery, the diode acts as a short and a large current spike flows in the MOSFET. This spike is reflected in the current sense signal. Using an ultra-fast rectifier reduces the magnitude of this current. Higher leakage inductance in the transformer also reduces the magnitude of this spike. However, increasing the transformer leakage inductance is not a viable option since that will lead to large voltage spikes across the rectifier diode and across the MOSFET during turn-off. In addition, the secondary leakage inductance of the transformer forms a resonant circuit with the parasitic capacitance of the rectifier diode. This ringing is also reflected in the current sense waveform (R5 and C10 in Figure 1 form a snubber to critically damp this ringing).
(2) The total capacitance on the MOSFET drain side includes the MOSFET drain-source capacitance (C_{ds}), parasitic transformer winding capacitance, junction capacitance of the snubber diode (C_{j}) and any other trace capacitance on board. At turn-on, the total equivalent capacitance discharges through the MOSFET and current sense resistor.
(3) The MOSFET gate operating current also flows through the current sense resistor.
The MAX1856 deals with this leading edge noise by using blanking. Since the problem noise arises immediately after turn on, the MAX1856 ignores the current sense line for 100ns after turn on. As shown in Figure 1 an additional external low pass filter (R2, C7) may be used. The RC time constant of this filter should not be too large as that may distort the current sense signal. Typical values recommended are 100Ω for R2 and 1000pF for C7 (see the MAX1856 data sheet).
The MAX1856 Switching Frequency
The MAX1856 switching frequency can be varied from 100kHz to 500kHz based on the choice of resistor R4 in Figure 1. The switching frequency f_{sw} is set by R4 as f_{sw} = (5 × 10^{10})/R4.Transformer Design
Having considered the main features of the MAX1856 that have a direct bearing on application circuit design parameters, we now focus on the flyback transformer design. In the following sections an iterative descriptive process is chosen rather than a purely mathematical technique. This is done to give the inexperienced designer a good feel for the function of the core and the air gap in a flyback transformer and the controlling parameters. In particular, the selection of the core, the selection of primary inductance and the selection of primary turns are areas considered in some detail.A flyback transformer is actually a coupled inductor. Unlike a true transformer, its main purpose is to store energy, not simply transfer it. Ideal magnetic materials cannot store energy. In practice, the small amount of energy stored in magnetic materials ends up as loss. In order to store and return energy to the circuit efficiently and with minimum physical size, a small non-magnetic gap (typically air gap) is required in series with a high permeability magnetic core material. Virtually, all of the energy is stored in the so-called non-magnetic gap(s). The core provides an easy, low reluctance flux path to link the energy stored in the gap to the winding. The core, in essence, efficiently couples the energy storage location to the external circuit. This function is accompanied by core losses due to flux swings and core saturation where the core becomes non-magnetic above a certain flux density level.
According to Faraday's law, the amount of flux swing is given by dividing the flux rate of change (Volts/turn) by the core cross-section area and multiplying by the switch ON time. The amount of air gap introduced has no effect on the amount of flux swing B_{ac}. The air gap changes the slope (reduces slope - see Figure 2) of the B-H curve so that the gapped core can support a much larger value of H without saturation. A DC current component in the windings gives rise to a DC magnetizing force H_{DC} on the H-axis of the B-H loop. This DC component in turn results in a mean flux density B_{dc}. Therefore, for the gapped core, a much larger DC current is required to produce the same mean flux density as the non-gapped core.
Figure 2. Magnetization loops for a ferrite transformer with and without an air gap. Notice the increased transferred energy DeltaH when a large air gap is used.
The improved tolerance to DC current becomes particularly important in the continuous mode operation since the current in the core never falls to zero. In continuous mode, the ripple current is small enough that AC loss (in the core) is not significant, but in discontinuous mode AC losses may dominate. Sufficient turns and core area are provided to support the applied pulse conditions, and sufficient air gap is provided in the core to prevent saturation and support the DC components.
Transformer Core Selection
A core appropriate for output power at the operating frequency is selected. Core materials used for flyback transformer construction include ferrite, Kool-Mu and powdered iron. Core loss in powdered iron is higher than in ferrite. At frequencies below 50kHz the minimum obtainable winding loss will normally exceed the core loss. However, at the higher frequencies of operation (>100kHz) the core loss is equally dominant. The core loss is also dependent on the flyback operation mode (continuous or discontinuous). Balancing core and winding losses, if possible, results in the most optimum design. Ferrite is normally chosen for core material in designs over 50kHz.The core area product (W_{a}A_{c}), obtained by multiplying the core magnetic cross-section area by window area available for winding, is widely used for an initial estimate of core size for a given application. A rough indication of the required area product is given byW_{a}A_{c} = [P_{O}/(KΔBf_{sw})]^{4/3}
Where P_{O} = Output Power (W)
ΔB = Flux Density swing (Tesla)
f_{sw} = switching frequency
K = winding factor
There are many variables involved in estimating the appropriate core size. Core power handling capability does not scale linearly with area product or with core volume. A larger transformer must operate at a lower power density because the surface area dissipating heat does not increase in proportion to the volume producing the heat. Most manufacturer's no longer provide area-product information but use their own methodology to estimate power handling capability for a given core size.
The shape of the core is not a significant consideration for continuous mode operation due to low AC losses. For discontinuous mode operation, the winding area window is chosen as wide as possible to minimize AC winding losses. EC, ETD, EFD, LP cores are all E-E core shapes with large wide windows. Applications requiring low profile can benefit from using EFD cores. A table of suitable ferrite core types (Table 2) for various power levels is given for applications with the MAX1856 controller (frequency range 100kHz to 500kHz).
Table 2. Ferrite Core Selection for Transformer Construction
Output Power Level | Recommended Core Types |
0 to 10W | EFD15, EF12.6, EF16, EE8.3 (<6W), EE13,EE16, EE19 |
10W to 20W | EFD17, EFD20, EF20, EE13, EE19, EE22 |
20W to 30W | EFD20, EFD25, EE13, SEE16 |
The specifications in Table 1 indicate that Application 1 (four service lines) needs 23W of output power while the other two applications (dual line) need output power of 11W. An EFD20 core is selected for the quad line application and an EFD17 core is selected for the 12Vin dual line application. The 5Vin dual line application uses an EFD15 core.
Deciding Flyback Converter Operation
The next step is to decide the flyback converter mode of operation, continuous or discontinuous. Discontinuous mode requires less inductance and a smaller transformer but operates with higher AC winding loss due to higher RMS currents and higher core losses due to the large flux swing. The higher losses result in lower efficiency. The lower loss in continuous mode operation offers lower component temperatures and higher output power. The higher core loss in discontinuous mode may reduce the difference in transformer size between the two modes of operation. Therefore, the main trade off between discontinuous mode and continuous mode is between transformer size and efficiency. From a systems standpoint, continuous mode operation provides less ripple current and this results in reduced capacitor requirements. The discontinuous mode also results in poor cross-regulation in multiple output supplies.Some control loop comments on continuous mode are in order here. Traditionally, the continuous mode loop analysis is considered more difficult due to the existence of a right half plane (RHP) zero and a complex pole pair that shift with duty cycle. However, the MAX1856 uses internal compensation and provides adequate phase margin over the line and load combinations considered. This makes the stabilization of the MAX1856 for continuous mode operation a simple matter.
Given the pros and cons discussed and the output power requirements in Table 1, choose the continuous mode of operation.
Turns Ratio and Duty Cycle Considerations
Theoretically, a flyback circuit can function with any turns ratio, regardless of V_{IN} and V_{OUT}. In practice, the turns ratio of a flyback converter transformer is an important variable. It affects the current levels associated with the primary side and secondary rectifier diode. The voltage stress at the MOSFET drain due to the reflected output voltage is determined by the turns ratio, N. The turns ratio also determines the duty cycle for a given application. Using too wide a duty cycle to deliver equal average current reduces efficiency. A very narrow duty cycle increases the current in the primary side, increasing the operating temperature of the primary winding and the MOSFET. Hence, with high voltage outputs and/or multiple secondary side outputs, it is advantageous to increase N. However, it is impractical to use a turns ratio higher than 6 or 8 since that may require multiple layer windings for the secondary wound back and forth. The end of the second layer is directly over the beginning of the first layer. The effect of this significant end-end capacitance between these layers is magnified because of the large AC voltage across the many intervening turns. Higher number of layers increases capacitance, reduces coupling and increases leakage inductance. Some iteration may be needed in the case of multiple outputs to make sure the turns are all integer values. The lowest voltage secondary usually dominates this process, because the jumps between integral turns result in a larger percentage change.Equation 1 below describes the relation between turns ratio and duty cycle for a given output and input voltage specification.
|(V_{OUTx} + V_{D})|/V_{IN} = (N)[D/(1-D)] ------------eq.(1)
Where
V_{OUTx} = Output Voltage at output 'x',
V_{D} = Forward Voltage drop across the secondary rectifier
N = turns ratio (ratio of secondary turns (N_{S}) to primary turns (N_{P}))
D = MOSFET duty cycle
Therefore,
|(V_{OUTx} + V_{D})|/V_{IN, MIN} = (N)[D_{MAX}/(1-D_{MAX})] ------------eq.(1a)
and
|(V_{OUTx} + V_{D})|/V_{IN, MAX} = (N)[D_{MIN}/(1-D_{MIN})] ------------eq.(1b)
Referring to Table 1 again, for the quad and dual line applications with 12V input voltage specification choose a turns ratio of
V_{BAT2}/V_{IN} = 2 and V_{BAT1}/V_{IN} = 6.67
This results in a 49% duty cycle at nominal input voltage.
However, for application 3 in Table 1 (dual line from 5V input) this strategy results in a turns ratio of 16 for V_{BAT1}. As discussed earlier, this is impractical. Therefore, choose a maximum turns ratio of 8 (for V_{BAT1}). Assuming a 1V drop across the two rectifier diodes and substituting in eq.(1) we have a duty cycle of 67% at the nominal input voltage. Using eq.(1) again, we then have a turns ratio of 2.5 for the talk battery output (V_{BAT2}).
Switching Frequency
As mentioned earlier (refer to "Transformer Core Selection") use an EFD15/17 core for the two dual line applications. To get the required output power of 11W (Table 1) with the EFD15/17, choose an operating frequency of about 330kHz for application 2 and a frequency of 500kHz for application 3 based on core manufacturer's data sheets. For the quad line application (application 1 in Table 1) the choice of EFD20 for the core, implies a minimum switching frequency of 300kHz. At a switching frequency of 330kHz, the quad line application 1 results in a much smaller flux swing as compared to the dual line application 2 in Table 1. This is due to the larger core size chosen. However, the larger output power will also result in a larger DC current component for the quad line application. To ensure that the core does not saturate under worst case conditions we can reduce the flux swing further by increasing the switching frequency and use a lower primary inductance value for the same ripple current. This will mean using a larger air gap for the same core that will help to handle higher DC current components. Referring to Figure 1 and section "The MAX1856 Current Mode Controller-The MAX1856 Switching Frequency", R4 is a 100kΩ resistor for the 500kHz applications and 0.15MΩ for 330kHz.Calculate Primary and Secondary Turns
A good starting point is to work on the basis of 1V/turn for the primary. Considering the input voltage specifications in Table 1 results (rounding off to the nearest integer) in 5 turns for application 3, and 11 turns for the first two applications. Since the quad line application has a smaller flux swing we use a more aggressive number of 1.25V/turn for the primary. The number of turns for application 1 (quad line) is therefore changed to 9 turns for an input voltage specification of 12V ±10% (Table 1).The required output voltage for the talk battery is -24V and for the ringer is -80V. Assuming a drop of 1V and 1.25V across the secondary rectifiers, the voltage at the secondary of the transformer is -25V and -81.25V respectively.
For the first application (quad line), using the volt-seconds approach, the number of turns in the secondary is
N_{S1} = (25/1.25) × [D_{MIN}/(1-D_{MIN})] = 18.46 ≈ 18
N_{S2} = (81.25/1.25) × [D_{MIN}/(1-D_{MIN})] = 59.98 ≈ 60
Using a similar approach for application 2 (dual line 12V input) we get
N_{S1} = 25 × [D_{MIN}/(1-D_{MIN})] = 23.07
N_{S2} = 81.25 × [D_{MIN}/(1-D_{MIN})] = 74.76
Note that the turns ratio obtained using the volt-seconds equation results in approximately the same value as that desired by the voltage ratio between the output and input (see "Turns Ratio and Duty Cycle Considerations" gives secondary turns of 22 and 73 respectively).
For application 3, the turns ratio does not equal the ratio of output voltage to input voltage. Use the turns ratio chosen earlier to calculate the secondary turns. This gives 12.5 turns for the -24Voutput and 40 turns for the -80V output. Half turns are avoided if possible. Therefore change the number of primary turns to 6 for application 3. This results in 15 turns for the -24V output and 48 turns for the -80V output in the dual line 5V input application.
Primary Inductance L_{P}
Inductance L_{P} can now be calculated from the total output power P_{O}, efficiency η, peak input current I_{P,pk}, switching frequency f_{sw} and LIR which is the ratio of input ripple current (ΔI_{P}) to input average current ratio (I_{P,avg}).The average input current is given by
I_{P,avg} = [P_{O}/(η × V_{IN, min})] -----------eq.(2)
Where
V_{IN, min} = Minimum Input Voltage
η = Efficiency
P_{O} = Total output power required
The peak input current is, therefore
I_{P,pk} = 2 × I_{P,avg}/[(2-K_{R}) × D_{MAX}] -----------eq.(3)
Where
D_{MAX} = Maximum Duty Cycle
K_{R} = Ratio of ripple current to peak current
This gives the ripple current as
ΔI_{P} = 2 × [I_{P,pk} - (I_{P,avg}/D_{MAX})] ------------eq.(4)
We can now calculate the primary inductance as
L_{P} = [(V_{IN, min }× D_{MAX})/ (ΔI_{P} × f_{sw})] -----------eq.(5)
The gap dimensions determine the inductance per turn achievable for a given core. The manufacturer for pre-gapped ferrite cores or for distributed-gap metal cores often states the inductance factor A_{L} expressed in nano-Henry per square turns. Eq.(6) below provides a convenient method for calculating inductance for an existing gapped core for a given number of turns.
A_{L} = L_{P}/N_{P}² -------------eq.(6)
A LIR ratio of 0.4 has been found in practice to be a good choice giving good core utilization and reasonable overall efficiency. Choose this as the starting point to calculate the currents in the primary.
Using eq.(1) through eq.(5) and assuming efficiency of 70% for quad line application, gives I_{P,avg}/D_{MAX} = 5.74, ΔI_{P} = 2.3A, I_{P,pk} = 6.89A, primary inductance L_{P} = 4.98µH nominal and sense resistor R1 = 14.5mΩ. The designed transformer has primary inductance L_{P} = 4µH (±20% tolerance) and so R1 = 13mΩ.
Assuming an efficiency of 80% for the lower output power of application 2 (dual line) and using a similar methodology results in L_{P} = 18µH and use R1 = 34.7mΩ. Based on actual transformer parameters measured, the inductance L_{P} = 16.7µH and so use R1 = 33mΩ.
For application 3 we get I_{P,avg}/D_{MAX} = 4.43 andΔI_{P} = 1.48A. Using eq.(4) and eq.(5) the primary peak current I_{P,pk} is 5.17A and inductance L_{P} is 4.2µH nominal. The sense resistor R1 should be (100mV/5.17A) =19.3mΩ.
Lower values of inductance will result in larger ripple current while larger values of inductance will result in smaller ripple current. From a systems standpoint, small inductor ripple currents are desirable due to reduced output capacitor requirements and continuous current operation with light loads. However, because of the shallow slope presented to the current sense circuit, it can lead to pulse-width jitter caused by random or synchronous noise. Adding slope compensation will result in more stable operation especially for duty cycles greater than 50% (as is the case in application 3). As mentioned earlier (see "The MAX1856 Current Mode Controller—Slope Compensation in The MAX1856") a fixed amount of slope compensation is internally added in the MAX1856 depending on the duty cycle and switching frequency. In a peak current detecting mode, the average current can vary with duty cycle and input voltage. Adding slope compensation equal to half the current down-slope forces the average inductor current to follow the error voltage resulting in ideal current mode control. Adding a much larger slope compensation ramp causes the controller to behave less like an ideal current mode controller and more like a voltage mode controller. To choose an inductor value such that the slope compensation is 0.5 times the secondary current down slope use (use any secondary output)
L_{P} = [(0.9 × D_{MAX})/ (42mV × f_{sw})] × (V_{OUTx} + V_{D}) × (1/N) × R1 × 0.5 ------eq.(7)
For the example of application 3 this suggests a value of 2.85µH at nominal switching frequency and R1 = 19mΩ. The duty cycle in application 3 is much larger than 50% and the right amount of slope compensation will stabilize the waveforms. Select a value estimated by eq.(7). The transformer used has a primary inductance for the transformer of 2µH. Choose R1 = 12mΩ.
Transformer Windings and Placement
The primary wire size is calculated based on the available winding width and the number of turns. The intention is to make the winding cover the entire width of the bobbin BW_{a} as this will provide the best coupling. Using transformer wire table (Table 3) look for a wire with outside diameter (including insulation) OD_{P} = BW_{a} / N_{P}. Corresponding to each wire gauge there is a measure of the bare conductor area specified in circular mil (CM). Next calculate the current carrying capacity of the winding specified as circular mils per amp (CMA_{P}) where CMA_{P} = CM_{P}/ I_{Prms} and I_{Prms} is the primary current rms value.Table 3. Transformer Wire Table
AWG Wire Size | Nearest SWG Wire Size | Bare Conductor Area | Outside Diameter (with Insulation) | ||
cm² x 10^{-3} | CIR-MIL (CM) | cm | inch | ||
14 | 16 | 20.82 | 4109 | 0.171 | 0.0675 |
15 | 17 | 16.51 | 3260 | 0.153 | 0.0602 |
16 | 13.07 | 2581 | 0.137 | 0.0539 | |
17 | 18 | 13.39 | 2052 | 0.122 | 0.0482 |
18 | 19 | 8.228 | 1624 | 0.109 | 0.0431 |
19 | 20 | 6.531 | 1289 | 0.0980 | 0.0386 |
20 | 21 | 5.188 | 1024 | 0.0879 | 0.0346 |
21 | 22 | 4.116 | 812.3 | 0.0785 | 0.0309 |
22 | 3.243 | 640.1 | 0.0701 | 0.0276 | |
23 | 24 | 2.588 | 510.8 | 0.0632 | 0.0249 |
24 | 25 | 2.047 | 404.0 | 0.0566 | 0.0223 |
25 | 26 | 1.623 | 320.4 | 0.0505 | 0.0199 |
26 | 1.280 | 252.8 | 0.0452 | 0.0178 | |
27 | 29 | 1.021 | 201.6 | 0.0409 | 0.0161 |
28 | 30 | 0.8046 | 158.8 | 0.0366 | 0.0144 |
29 | 31 | 0.6470 | 127.7 | 0.0330 | 0.0130 |
30 | 33 | 0.5067 | 100.0 | 0.0294 | 0.0116 |
31 | 34 | 0.4013 | 79.21 | 0.0267 | 0.0105 |
32 | 0.3242 | 64.00 | 0.0241 | 0.0095 | |
33 | 0.2554 | 50.41 | 0.0216 | 0.0085 | |
34 | 0.2011 | 39.69 | 0.0191 | 0.0075 | |
35 | 0.1589 | 31.36 | 0.0170 | 0.0067 | |
36 | 39 | 0.1266 | 25.00 | 0.0152 | 0.0060 |
37 | 41 | 0.1026 | 20.25 | 0.0140 | 0.0055 |
38 | 42 | 0.08107 | 16.00 | 0.0124 | 0.0049 |
39 | 43 | 0.06207 | 12.25 | 0.0109 | 0.0043 |
40 | 44 | 0.04869 | 9.61 | 0.0096 | 0.0038 |
41 | 45 | 0.03972 | 7.84 | 0.00863 | 0.0034 |
42 | 46 | 0.03166 | 6.25 | 0.00762 | 0.0030 |
43 | 47 | 0.02452 | 4.84 | 0.00685 | 0.0027 |
44 | 0.0202 | 4.00 | 0.00635 | 0.0025 |
The rms value of the transformer primary current I_{Prms} is given by (see Figure 3)
I_{Prms} = {D[I_{Ppk} × I_{Pm} + (1/3) (I_{Ppk} - I_{Pm})²]}^{0.5}
Figure 3. Continuous mode primary current waveform.
The CMA_{P} calculated should be in the 200 to 500 range. Above 500 the wire is underused in terms of capacity. Current crowding occurs near the surface, especially at high frequencies (i.e., "skin effect"), and reduces the effective current carrying area in the wire. Use multi-filar windings to achieve the same CMA_{P}. Do not simply bundle the wires or twist them together. Parallel conductors within one winding and rotate them together all through while winding. Iteration may be required to optimize the wire size and the number of strands in the winding. Below 200 the current density is too high. This may be overcome by using a larger core size or by using multiple layers in series.
Extreme caution should be exercised in using multiple layers. If the conductor is thicker than the skin depth, the AC resistance of the wire increases as compared to its DC resistance and the I²R loss increases exponentially with number of layers. The conductor thickness should be small enough for the field to penetrate completely through the conductor so that any opposing currents at the surfaces of the inner layers cancel. A split winding technique can be used for the primary where the first layer of the primary is the innermost layer and the second layer is wound as the outermost layer after the secondary are wound. This reduces leakage inductance but needs a spare pin on the bobbin to allow for termination of the center point.
Now calculate the wire size for the secondary windings. For multiple output supplies the peak secondary current calculated should match the power output on that winding. This ensures that the secondary wire gauge is never oversized. The secondary current waveform is similar to the primary current waveform except the current slope is negative. To calculate the peak secondary current use
I_{Spkx} = (I_{Ppk}/N_{Sx}) × (ΣP_{Ox}/P_{O}) and I_{Smx} = (I_{Pm}/N_{Sx}) × (ΣP_{Ox}/P_{O})
Where P_{Ox} is output power for the winding being calculated and P_{O} is the total output power. The rms secondary current is given by
I_{Srmsx} = {D[I_{Spkx} × I_{Smx} + (1/3) (I_{Spkx} - I_{Smx})²]}^{0.5}
The above assumes separate windings for each output. High AC losses can occur in windings that are carrying little or no current if they are located in the region of high AC magnetic field intensity between primary and secondary. Situations of this nature include lightly loaded or unloaded secondary in multiple output supplies. In the SLIC applications discussed here this is a very probable situation, where the ringer supply is fully loaded and there is no load on the talk battery supply, or vice versa. Use stacked windings to reduce these passive winding losses (Figure 4). S2 has to carry its own current, but S1 has to carry the current of S1 and S2 combined. To account for this the secondary current calculation now becomes
I_{Spkx} = (I_{Ppk}/N_{Sx}) × (ΣP_{Ox}/P_{O}) and I_{Smx} = (I_{Pm}/N_{Sx}) × (ΣP_{Ox}/P_{O})
Where ΣP_{Ox} is the total power for the winding (stays the same for S2 but is different for S1). The rms secondary current equation is the same. Match the current capacity for the primary and the secondary and calculate the secondary wire size as CMS = CMA_{P} × I_{Srmsx}.
Figure 4. Stacked windings for transformer secondary.
With multiple secondaries, windings should be sequenced so the highest power secondary winding is closest to the primary. For the dual output supplies discussed here, the interleaved winding sequence of P-S2-S1-P (P refers to primary and S refers to secondary winding respectively), starting from the innermost to the outermost winding, results in the best coupling between the two secondary and between the primary and each of the secondary. The multiple primary layers can also be paralleled in this case. The field divides equally between the two winding portions in order to minimize the stored energy and also result in minimum I²R losses. Paralleling succeeds when equal division of current among the parallel paths results in the least stored energy.
The wire sizes for the three transformers (for the three applications) are calculated using the procedure discussed above. Since this is an iterative process the final results are presented in Table 4. The previously calculated primary inductance values, number of turns, etc. are also presented in the same table to present a complete picture of the final transformer design. The bobbins used for these transformers each have 12 pins. Also refer to Figure 4 in conjunction with Table 4 for a complete understanding of the transformer construction.
The order of winding as mentioned earlier is (from innermost to outermost layer) viz.; primary, secondary (S2), secondary (S1) and primary. This gives the minimum leakage inductance and the best cross-regulation. A stacked winding construction is used where S1 and S2 combined (from pin 4 to pin 7) yield the V_{BAT1} output voltage of -80V for the ringer and S1 alone (pin 6 to 7) yields the talk battery V_{BAT2} output of -24V. Note referring to Figure 4 that the secondary winding S2 consists of two layers (pins 4-9 and pins 5-8). This is done to reflect the construction of the actual DT Magnetic transformers used in these applications. The transformers therefore allow for the possibility of tapping a different output voltage (-48V) for the ringer while still using the same transformer. Pins 1, 2 to 12, 11 form the primary winding. The table also mentions the corresponding DT Magnetic transformer part number that is actually used in these applications.
Table 4. Parameters for Transformers Designed for SLIC Applications
Transformer Parameter | Application 1 | Application 2 | Application 3 |
Frequency f_{sw} (kHz) | 500 | 330 | 500 |
Core | EFD20 | EFD17 | EFD15 |
Inductance Factor A_{L} (nH/T²) | 53 | 138 | 55 |
Primary Inductance L_{P} (µH) | 4 | 16.7 | 2 |
Peak primary current | 7.5A | 3A | 8A |
# turns primary | 9 | 11 | 6 |
# layers primary | 2 | 2 | 2 |
# strands primary | 3 | 2 | 3 |
Primary wire gauge | 26 AWG | 30AWG | 26 AWG |
# turns secondary S2 | 24 (pins 4-9) + 18 (pins 5-8) | 28 (pins 4-9) + 22 (pins 5-8) | 17 (pins 4-9) + 17 (pins 5-8 |
# layers secondary S2 | 2 (1 layer 4-9, 1 layer 5-8) | 2 (1 layer 4-9, 1 layer 5-8) | 1 (4-9, 5-8 interleaved) |
# strands secondary S2 | 2 each in both layers | 1 in each layer | 2 |
S2 wire gauge | 36AWG | 32 AWG (4-9) + 30 AWG (5-8) | 34 AWG |
# turns secondary S1 | 18 | 22 | 15 |
# layers secondary S1 | 1 | 1 | 1 |
# strands secondary S1 | 2 | 1 | 2 |
S1 wire gauge | 36 AWG | 30 AWG | 34 AWG |
DT Magnetics Part # | DTPH10000-0001 | DTPH1000-0002 | DTPH1000-0003 |
Conclusion
The efficiency (Table 5) at maximum load and cross regulation (Table 6) data for these three applications is now presented as proof of the design concepts discussed.Table 5. Efficiency Data for the Three Application Circuits
Input Voltage (V) | Application 1 Efficiency % (-80V @ 250mA; -24V @ 120mA) | Application 2 Efficiency % (-80V @ 120mA; -24V @ 60mA) | Application 3 Efficiency % (-80V @ 1200mA; -24V @ 60mA) |
10.8 | 74.4 | 83.2 | |
12 | 73.3 | 83.1 | |
13.2 | 72.3 | 82.6 | |
4.5 | 71.5 | ||
5 | 72.0 | ||
5.5 | 72.0 |
Table 6. Cross Regulation Data at Nominal Input Voltage
Output Voltage Being Considered | Application 1 (Input Voltage = 12V) | Application 2 (Input Voltage = 12V) | Application 3 (InputVoltage = 5V) | |||
-80V @ 250mA; -24V no load | -80V no load; -24V @ 120mA | -80V @ 120mA; -24V no load | -80V no load; -24V @ 60mA | -80V @ 120mA; -24V no load | -80V no load; -24V @60mA | |
V_{BAT1} | -80.9 | -82.7 | -78.41 | -79.61 | -79.8 | -82 |
V_{BAT2} | -24.8 | -22.61 | -23.87 | -22.93 | -24.63 | -23.51 |
References
- Unitrode Magnetics Design Handbook (SLUP003) 2001 Flyback Transformer Design for the IR40xx Series- International Rectifier Application Note (AN1024) 2/13/2001.